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342
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1
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364
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2 from ..basetarget import Instruction, LabelAddress
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346
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3 from ...bitfun import rotate_left
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342
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4
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5 from .token import ArmToken
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345
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6 from .registers import R0, SP, ArmRegister
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7
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8
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9 def encode_imm32(v):
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10 """ Bundle 32 bit value into 4 bits rotation and 8 bits value
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11 """
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12 for i in range(0, 16):
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13 v2 = rotate_left(v, i*2)
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14 if (v2 & 0xFFFFFF00) == 0:
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15 rotation = i
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16 val = v2 & 0xFF
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17 x = (rotation << 8) | val
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18 return x
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19 raise Exception("Invalid value {}".format(v))
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342
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20
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21 # Instructions:
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22
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23 class ArmInstruction(Instruction):
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24 def __init__(self):
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25 self.token = ArmToken()
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26
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27
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353
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28 class ConstantData(ArmInstruction):
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346
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29 def __init__(self, v):
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30 super().__init__()
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353
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31 assert isinstance(v, int)
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346
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32 self.v = v
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33
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353
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34
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364
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35 class Dcd(ArmInstruction):
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36 def __init__(self, v):
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37 super().__init__()
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38 assert isinstance(v, int) or isinstance(v, LabelAddress)
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39 self.v = v
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40
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346
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41 def encode(self):
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364
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42 if type(self.v) is int:
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43 self.token[0:32] = self.v
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44 else:
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45 self.token[0:32] = 0
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346
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46 return self.token.encode()
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47
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364
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48 def relocations(self):
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49 if type(self.v) is LabelAddress:
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50 return [(self.v.name, 'absaddr32')]
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51 return []
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52
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350
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53 def __repr__(self):
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364
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54 if type(self.v) is int:
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55 return 'DCD {}'.format(hex(self.v))
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56 else:
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57 return 'DCD ={}'.format(self.v.name)
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350
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58
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346
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59
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353
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60 class Db(ConstantData):
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61 def encode(self):
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62 assert self.v < 256
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63 return bytes([self.v])
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64
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65 def __repr__(self):
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66 return 'DB {}'.format(hex(self.v))
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67
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68
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346
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69 def Mov(*args):
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70 if len(args) == 2:
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71 if isinstance(args[1], int):
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72 return Mov1(*args)
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73 elif isinstance(args[1], ArmRegister):
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74 return Mov2(*args)
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75 raise Exception()
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76
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77
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78 class Mov1(ArmInstruction):
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342
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79 """ Mov Rd, imm16 """
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80 def __init__(self, reg, imm):
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81 super().__init__()
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346
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82 assert type(imm) is int
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342
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83 self.reg = reg
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84 self.imm = imm
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85
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86 def encode(self):
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346
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87 self.token[0:12] = encode_imm32(self.imm)
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345
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88 self.token.Rd = self.reg.num
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342
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89 self.token[16:20] = 0
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346
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90 self.token[20] = 0 # Set flags
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342
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91 self.token[21:28] = 0b0011101
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346
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92 self.token.cond = AL
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342
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93 return self.token.encode()
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94
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95 def __repr__(self):
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345
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96 return 'Mov {}, {}'.format(self.reg, self.imm)
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97
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98
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346
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99 class Mov2(ArmInstruction):
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100 def __init__(self, rd, rm):
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101 super().__init__()
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102 self.rd = rd
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103 self.rm = rm
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104
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105 def encode(self):
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106 self.token[0:4] = self.rm.num
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107 self.token[4:12] = 0
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108 self.token[12:16] = self.rd.num
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109 self.token[16:20] = 0
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110 self.token.S = 0
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111 self.token[21:28] = 0xD
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112 self.token.cond = AL
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113 return self.token.encode()
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114
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350
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115 def __repr__(self):
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116 return 'MOV {}, {}'.format(self.rd, self.rm)
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117
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346
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118
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352
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119 def Cmp(*args):
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120 if len(args) == 2:
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121 if isinstance(args[1], int):
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122 return Cmp1(*args)
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123 elif isinstance(args[1], ArmRegister):
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124 return Cmp2(*args)
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125 raise Exception()
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126
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127
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128 class Cmp1(ArmInstruction):
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129 """ CMP Rn, imm """
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130 def __init__(self, reg, imm):
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131 super().__init__()
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132 assert type(imm) is int
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133 self.reg = reg
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134 self.imm = imm
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135
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136 def encode(self):
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137 self.token[0:12] = encode_imm32(self.imm)
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138 self.token.Rn = self.reg.num
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139 self.token[20:28] = 0b00110101
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140 self.token.cond = AL
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141 return self.token.encode()
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142
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143 def __repr__(self):
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144 return 'CMP {}, {}'.format(self.reg, self.imm)
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145
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146
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147 class Cmp2(ArmInstruction):
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148 """ CMP Rn, Rm """
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149 def __init__(self, rn, rm):
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150 super().__init__()
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151 self.rn = rn
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152 self.rm = rm
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153
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154 def encode(self):
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155 self.token.Rn = self.rn.num
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156 self.token.Rm = self.rm.num
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157 self.token[7:16] = 0
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158 self.token[20:28] = 0b10101
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159 self.token.cond = AL
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160 return self.token.encode()
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161
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162 def __repr__(self):
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163 return 'CMP {}, {}'.format(self.rn, self.rm)
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164
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165
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345
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166 def Add(*args):
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167 if len(args) == 3 and isinstance(args[0], ArmRegister) and \
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168 isinstance(args[1], ArmRegister):
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169 if isinstance(args[2], ArmRegister):
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170 return Add1(args[0], args[1], args[2])
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171 elif isinstance(args[2], int):
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172 return Add2(args[0], args[1], args[2])
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173 raise Exception()
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174
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175 def Sub(*args):
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176 if len(args) == 3 and isinstance(args[0], ArmRegister) and \
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177 isinstance(args[1], ArmRegister):
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178 if isinstance(args[2], ArmRegister):
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179 return Sub1(args[0], args[1], args[2])
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180 elif isinstance(args[2], int):
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181 return Sub2(args[0], args[1], args[2])
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182 raise Exception()
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183
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352
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184
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346
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185 def Mul(*args):
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186 return Mul1(args[0], args[1], args[2])
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187
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188
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354
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189 class Mul1(ArmInstruction):
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346
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190 def __init__(self, rd, rn, rm):
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191 super().__init__()
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192 self.rd = rd
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193 self.rn = rn
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194 self.rm = rm
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195
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196 def encode(self):
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197 self.token[0:4] = self.rn.num
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198 self.token[4:8] = 0b1001
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199 self.token[8:12] = self.rm.num
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200 self.token[16:20] = self.rd.num
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201 self.token.S = 0
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202 self.token.cond = AL
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203 return self.token.encode()
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204
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205
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345
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206 class OpRegRegReg(ArmInstruction):
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207 """ add rd, rn, rm """
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208 def __init__(self, rd, rn, rm, shift=0):
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209 super().__init__()
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210 self.rd = rd
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211 self.rn = rn
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212 self.rm = rm
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213
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214 def encode(self):
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215 self.token[0:4] = self.rm.num
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216 self.token[4] = 0
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217 self.token[5:7] = 0
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218 self.token[7:12] = 0 # Shift
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219 self.token.Rd = self.rd.num
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220 self.token.Rn = self.rn.num
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221 self.token.S = 0 # Set flags
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222 self.token[21:28] = self.opcode
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223 self.token.cond = 0xE # Always!
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224 return self.token.encode()
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225
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226 def __repr__(self):
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354
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227 return '{} {}, {}, {}'.format(self.mnemonic, self.rd, self.rn, self.rm)
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345
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228
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229
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230 class Add1(OpRegRegReg):
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354
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231 mnemonic = 'ADD'
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345
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232 opcode = 0b0000100
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233
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234
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235 class Sub1(OpRegRegReg):
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354
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236 mnemonic = 'SUB'
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345
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237 opcode = 0b0000010
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238
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239
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240 class Orr1(OpRegRegReg):
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354
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241 mnemonic = 'ORR'
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345
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242 opcode = 0b0001100
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243
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342
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244
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356
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245 class And1(OpRegRegReg):
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246 mnemonic = 'AND'
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247 opcode = 0b0000000
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248
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249
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250 class ShiftBase(ArmInstruction):
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251 """ ? rd, rn, rm """
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252 def __init__(self, rd, rn, rm):
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253 super().__init__()
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254 self.rd = rd
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255 self.rn = rn
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256 self.rm = rm
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257
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258 def encode(self):
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259 self.token[0:4] = self.rn.num
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260 self.token[4:8] = self.opcode
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261 self.token[8:12] = self.rm.num
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262 self.token[12:16] = self.rd.num
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263 self.token.S = 0 # Set flags
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264 self.token[21:28] = 0b1101
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265 self.token.cond = 0xE # Always!
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266 return self.token.encode()
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267
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268 def __repr__(self):
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269 return '{} {}, {}, {}'.format(self.mnemonic, self.rd, self.rn, self.rm)
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270
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271
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272 class Lsr1(ShiftBase):
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273 mnemonic = 'LSR'
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274 opcode = 0b0011
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275
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276
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277 class Lsl1(ShiftBase):
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278 mnemonic = 'LSL'
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279 opcode = 0b0001
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280
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281
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345
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282 class OpRegRegImm(ArmInstruction):
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283 """ add rd, rn, imm12 """
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284 def __init__(self, rd, rn, imm):
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285 super().__init__()
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286 self.rd = rd
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287 self.rn = rn
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288 self.imm2 = encode_imm32(imm)
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289 self.imm = imm
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290
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291 def encode(self):
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292 self.token[0:12] = self.imm2
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293 self.token.Rd = self.rd.num
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294 self.token.Rn = self.rn.num
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295 self.token.S = 0 # Set flags
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296 self.token[21:28] = self.opcode
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297 self.token.cond = 0xE # Always!
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298 return self.token.encode()
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299
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300 def __repr__(self):
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354
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301 return '{} {}, {}, {}'.format(self.mnemonic, self.rd, self.rn, self.imm)
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345
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302
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303
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304 class Add2(OpRegRegImm):
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354
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305 mnemonic = 'ADD'
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345
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306 opcode = 0b0010100
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307
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308
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309 class Sub2(OpRegRegImm):
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354
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310 mnemonic = 'SUB'
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345
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311 opcode = 0b0010010
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312
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313
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314
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315 # Branches:
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316
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317 class BranchBaseRoot(ArmInstruction):
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318 def __init__(self, target):
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319 super().__init__()
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320 self.target = target
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321
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322 def encode(self):
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323 self.token.cond = self.cond
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324 self.token[24:28] = self.opcode
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325 return self.token.encode()
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326
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327 def relocations(self):
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328 return [(self.target, 'b_imm24')]
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329
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350
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330 def __repr__(self):
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331 mnemonic = self.__class__.__name__
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332 return '{} {}'.format(mnemonic, self.target)
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333
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345
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334
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346
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335 EQ, NE, CS, CC, MI, PL, VS, VC, HI, LS, GE, LT, GT, LE, AL = range(15)
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336
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345
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337 class BranchBase(BranchBaseRoot):
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338 opcode = 0b1010
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339
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340 class BranchLinkBase(BranchBaseRoot):
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341 opcode = 0b1011
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342
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343 class Bl(BranchLinkBase):
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346
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344 cond = AL
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345
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345
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346 class B(BranchBase):
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346
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347 cond = AL
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345
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348
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349 class Beq(BranchBase):
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346
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350 cond = EQ
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345
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351
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352 class Bgt(BranchBase):
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346
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353 cond = GT
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345
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354
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360
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355 class Bge(BranchBase):
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356 cond = GE
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357
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345
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358 class Ble(BranchBase):
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346
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359 cond = LE
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360
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361 class Blt(BranchBase):
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362 cond = LT
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363
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352
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364 class Bne(BranchBase):
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365 cond = NE
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346
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366
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367 # Memory:
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368
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369 def reg_list_to_mask(reg_list):
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370 mask = 0
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371 for reg in reg_list:
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372 mask |= (1 << reg.num)
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373 return mask
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374
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375
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376 class Push(ArmInstruction):
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377 def __init__(self, register_set):
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378 super().__init__()
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379 self.reg_list = register_set
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380
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381 def encode(self):
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382 self.token.cond = AL
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383 self.token[16:28] = 0b100100101101
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384 reg_list = 0
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385 self.token[0:16] = reg_list_to_mask(self.reg_list)
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386 return self.token.encode()
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387
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350
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388 def __repr__(self):
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389 return 'PUSH {}'.format(self.reg_list)
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390
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391
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346
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392 class Pop(ArmInstruction):
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393 def __init__(self, register_set):
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394 super().__init__()
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395 self.reg_list = register_set
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396
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397 def encode(self):
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398 self.token.cond = AL
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399 self.token[16:28] = 0b100010111101
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400 self.token[0:16] = reg_list_to_mask(self.reg_list)
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401 return self.token.encode()
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345
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402
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350
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403 def __repr__(self):
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404 return 'POP {}'.format(self.reg_list)
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405
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345
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406
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346
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407 def Ldr(*args):
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350
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408 """ Convenience function that creates the correct instruction """
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409 if len(args) == 3:
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410 if isinstance(args[1], ArmRegister):
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411 return Ldr1(*args)
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412 elif len(args) == 2:
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413 if isinstance(args[1], ArmRegister):
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414 return Ldr1(args[0], args[1], 0)
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415 elif isinstance(args[1], str):
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416 return Ldr3(*args)
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346
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417 raise Exception()
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418
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350
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419
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346
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420 def Str(*args):
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421 if len(args) == 3 and isinstance(args[1], ArmRegister):
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422 return Str1(*args)
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423 elif len(args) == 2 and isinstance(args[1], ArmRegister):
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424 return Str1(args[0], args[1], 0)
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425 raise Exception()
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426
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427
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428 class LdrStrBase(ArmInstruction):
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429 def __init__(self, rt, rn, offset):
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430 super().__init__()
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431 self.rt = rt
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432 self.rn = rn
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433 self.offset = offset
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434
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435 def encode(self):
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436 self.token.cond = AL
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437 self.token.Rn = self.rn.num
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438 self.token[25:28] = self.opcode
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439 self.token[20] = self.bit20
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440 self.token[12:16] = self.rt.num
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441 self.token[24] = 1 # Index
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442 if self.offset >= 0:
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443 self.token[23] = 1 # U == 1 'add'
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444 self.token[0:12] = self.offset
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445 else:
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446 self.token[23] = 0
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447 self.token[0:12] = -self.offset
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448 return self.token.encode()
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449
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350
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450 def __repr__(self):
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451 return '{} {}, [{}, {}]'.format(self.mnemonic, self.rt, self.rn,
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452 hex(self.offset))
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346
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453
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354
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454
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346
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455 class Str1(LdrStrBase):
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456 opcode = 0b010
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457 bit20 = 0
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350
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458 mnemonic = 'STR'
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346
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459
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460
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461 class Ldr1(LdrStrBase):
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462 opcode = 0b010
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463 bit20 = 1
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350
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464 mnemonic = 'LDR'
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346
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465
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466
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354
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467 class Adr(ArmInstruction):
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468 def __init__(self, rd, label):
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469 super().__init__()
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470 self.rd = rd
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471 self.label = label
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472
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473 def __repr__(self):
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474 return 'ADR {}, {}'.format(self.rd, self.label)
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475
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476 def relocations(self):
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477 return [(self.label, 'adr_imm12')]
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478
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479 def encode(self):
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480 self.token.cond = AL
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481 self.token[0:12] = 0 # Filled by linker
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482 self.token[12:16] = self.rd.num
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483 self.token[16:20] = 0b1111
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484 self.token[25] = 1
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485 return self.token.encode()
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486
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487
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346
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488 class Ldr3(ArmInstruction):
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350
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489 """ Load PC relative constant value
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490 LDR rt, label
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491 encoding A1
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492 """
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346
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493 def __init__(self, rt, label):
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350
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494 super().__init__()
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346
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495 self.rt = rt
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496 self.label = label
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497
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350
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498 def __repr__(self):
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499 return 'LDR {}, {}'.format(self.rt, self.label)
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500
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501 def relocations(self):
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502 return [(self.label, 'ldr_imm12')]
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503
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504 def encode(self):
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505 self.token.cond = AL
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506 self.token[0:12] = 0 # Filled by linker
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507 self.token[12:16] = self.rt.num
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508 self.token[16:23] = 0b0011111
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509 self.token[24:28] = 0b0101
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510 return self.token.encode()
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362
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511
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512
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513 class McrBase(ArmInstruction):
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514 """ Mov arm register to coprocessor register """
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515 def __init__(self, coproc, opc1, rt, crn, crm, opc2):
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516 super().__init__()
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517 self.coproc = coproc
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518 self.opc1 = opc1
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519 self.rt = rt
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520 self.crn = crn
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521 self.crm = crm
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522 self.opc2 = opc2
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523
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524 def encode(self):
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525 self.token[0:4] = self.crm
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526 self.token[4] = 1
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527 self.token[5:8] = self.opc2
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528 self.token[8:12] = self.coproc
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529 self.token[12:16] = self.rt.num
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530 self.token[16:20] = self.crn
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531 self.token[20] = self.b20
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532 self.token[21:24] = self.opc1
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533 self.token[24:28] = 0b1110
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534 self.token.cond = AL
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535 return self.token.encode()
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536
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537
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538 class Mcr(McrBase):
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539 b20 = 0
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540
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541
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542 class Mrc(McrBase):
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543 b20 = 1
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