|
114
|
1 import struct, time
|
|
129
|
2 from usb import UsbContext, UsbDevice
|
|
128
|
3 from devices import Interface, STLinkException, registerInterface
|
|
144
|
4 import adi
|
|
113
|
5
|
|
115
|
6 ST_VID, STLINK2_PID = 0x0483, 0x3748
|
|
|
7
|
|
113
|
8 def checkDevice(device):
|
|
|
9 return device.VendorId == ST_VID and device.ProductId == STLINK2_PID
|
|
|
10
|
|
115
|
11 DFU_MODE, MASS_MODE, DEBUG_MODE = 0, 1, 2
|
|
117
|
12
|
|
|
13 CORE_RUNNING = 0x80
|
|
|
14 CORE_HALTED = 0x81
|
|
|
15
|
|
114
|
16 # Commands:
|
|
|
17 GET_VERSION = 0xf1
|
|
|
18 DEBUG_COMMAND = 0xf2
|
|
|
19 DFU_COMMAND = 0xf3
|
|
|
20 GET_CURRENT_MODE = 0xf5
|
|
|
21
|
|
|
22 # dfu commands:
|
|
|
23 DFU_EXIT = 0x7
|
|
113
|
24
|
|
114
|
25 # debug commands:
|
|
|
26 DEBUG_ENTER = 0x20
|
|
|
27 DEBUG_EXIT = 0x21
|
|
|
28 DEBUG_ENTER_SWD = 0xa3
|
|
|
29 DEBUG_GETSTATUS = 0x01
|
|
143
|
30 DEBUG_FORCEDEBUG = 0x02
|
|
116
|
31 DEBUG_RESETSYS = 0x03
|
|
124
|
32 DEBUG_READALLREGS = 0x04
|
|
115
|
33 DEBUG_READREG = 0x5
|
|
|
34 DEBUG_WRITEREG = 0x6
|
|
|
35 DEBUG_READMEM_32BIT = 0x7
|
|
|
36 DEBUG_WRITEMEM_32BIT = 0x8
|
|
117
|
37 DEBUG_RUNCORE = 0x9
|
|
|
38 DEBUG_STEPCORE = 0xa
|
|
114
|
39
|
|
115
|
40 JTAG_WRITEDEBUG_32BIT = 0x35
|
|
114
|
41 JTAG_READDEBUG_32BIT = 0x36
|
|
|
42
|
|
|
43 # cortex M3
|
|
|
44 CM3_REG_CPUID = 0xE000ED00
|
|
|
45
|
|
128
|
46 @registerInterface((ST_VID, STLINK2_PID))
|
|
|
47 class STLink2(Interface):
|
|
|
48 """ STlink2 interface implementation. """
|
|
119
|
49 def __init__(self, stlink2=None):
|
|
129
|
50 self.devHandle = None
|
|
119
|
51 if not stlink2:
|
|
|
52 context = UsbContext()
|
|
|
53 stlink2s = list(filter(checkDevice, context.DeviceList))
|
|
|
54 if not stlink2s:
|
|
128
|
55 raise STLinkException('Could not find an ST link 2 interface')
|
|
119
|
56 if len(stlink2s) > 1:
|
|
|
57 print('More then one stlink2 found, picking first one')
|
|
|
58 stlink2 = stlink2s[0]
|
|
129
|
59 assert isinstance(stlink2, UsbDevice) # Nifty type checking
|
|
124
|
60 assert checkDevice(stlink2)
|
|
119
|
61 self.stlink2 = stlink2
|
|
130
|
62 def __del__(self):
|
|
|
63 if self.IsOpen:
|
|
|
64 if self.CurrentMode == DEBUG_MODE:
|
|
|
65 self.exitDebugMode()
|
|
|
66 self.close()
|
|
129
|
67 def __str__(self):
|
|
130
|
68 if self.IsOpen:
|
|
129
|
69 return 'STlink2 device version {0}'.format(self.Version)
|
|
|
70 else:
|
|
|
71 return 'STlink2 device'
|
|
113
|
72 def open(self):
|
|
130
|
73 if self.IsOpen:
|
|
129
|
74 return
|
|
119
|
75 self.devHandle = self.stlink2.open()
|
|
114
|
76 if self.devHandle.Configuration != 1:
|
|
|
77 self.devHandle.Configuration = 1
|
|
|
78 self.devHandle.claimInterface(0)
|
|
116
|
79
|
|
|
80 # First initialization:
|
|
|
81 if self.CurrentMode == DFU_MODE:
|
|
|
82 self.exitDfuMode()
|
|
|
83 if self.CurrentMode != DEBUG_MODE:
|
|
|
84 self.enterSwdMode()
|
|
132
|
85 #self.reset()
|
|
114
|
86 def close(self):
|
|
130
|
87 if self.IsOpen:
|
|
|
88 self.devHandle.close()
|
|
|
89 self.devHandle = None
|
|
|
90 @property
|
|
|
91 def IsOpen(self):
|
|
|
92 return self.devHandle != None
|
|
115
|
93 # modes:
|
|
113
|
94 def getCurrentMode(self):
|
|
114
|
95 cmd = bytearray(16)
|
|
|
96 cmd[0] = GET_CURRENT_MODE
|
|
|
97 reply = self.send_recv(cmd, 2) # Expect 2 bytes back
|
|
|
98 return reply[0]
|
|
113
|
99 CurrentMode = property(getCurrentMode)
|
|
114
|
100 @property
|
|
|
101 def CurrentModeString(self):
|
|
|
102 modes = {DFU_MODE: 'dfu', MASS_MODE: 'massmode', DEBUG_MODE:'debug'}
|
|
|
103 return modes[self.CurrentMode]
|
|
|
104 def exitDfuMode(self):
|
|
|
105 cmd = bytearray(16)
|
|
115
|
106 cmd[0:2] = DFU_COMMAND, DFU_EXIT
|
|
114
|
107 self.send_recv(cmd)
|
|
|
108 def enterSwdMode(self):
|
|
|
109 cmd = bytearray(16)
|
|
115
|
110 cmd[0:3] = DEBUG_COMMAND, DEBUG_ENTER, DEBUG_ENTER_SWD
|
|
114
|
111 self.send_recv(cmd)
|
|
|
112 def exitDebugMode(self):
|
|
|
113 cmd = bytearray(16)
|
|
115
|
114 cmd[0:2] = DEBUG_COMMAND, DEBUG_EXIT
|
|
114
|
115 self.send_recv(cmd)
|
|
|
116
|
|
|
117 def getVersion(self):
|
|
|
118 cmd = bytearray(16)
|
|
|
119 cmd[0] = GET_VERSION
|
|
|
120 data = self.send_recv(cmd, 6) # Expect 6 bytes back
|
|
|
121 # Parse 6 bytes into various versions:
|
|
|
122 b0, b1, b2, b3, b4, b5 = data
|
|
|
123 stlink_v = b0 >> 4
|
|
|
124 jtag_v = ((b0 & 0xf) << 2) | (b1 >> 6)
|
|
|
125 swim_v = b1 & 0x3f
|
|
|
126 vid = (b3 << 8) | b2
|
|
|
127 pid = (b5 << 8) | b4
|
|
|
128 return 'stlink={0} jtag={1} swim={2} vid:pid={3:04X}:{4:04X}'.format(\
|
|
|
129 stlink_v, jtag_v, swim_v, vid, pid)
|
|
|
130 Version = property(getVersion)
|
|
|
131
|
|
|
132 @property
|
|
|
133 def ChipId(self):
|
|
|
134 return self.read_debug32(0xE0042000)
|
|
|
135 @property
|
|
|
136 def CpuId(self):
|
|
|
137 u32 = self.read_debug32(CM3_REG_CPUID)
|
|
|
138 implementer_id = (u32 >> 24) & 0x7f
|
|
|
139 variant = (u32 >> 20) & 0xf
|
|
|
140 part = (u32 >> 4) & 0xfff
|
|
|
141 revision = u32 & 0xf
|
|
|
142 return implementer_id, variant, part, revision
|
|
117
|
143 def getStatus(self):
|
|
114
|
144 cmd = bytearray(16)
|
|
115
|
145 cmd[0:2] = DEBUG_COMMAND, DEBUG_GETSTATUS
|
|
114
|
146 reply = self.send_recv(cmd, 2)
|
|
|
147 return reply[0]
|
|
117
|
148 Status = property(getStatus)
|
|
|
149 @property
|
|
|
150 def StatusString(self):
|
|
|
151 s = self.Status
|
|
|
152 statii = {CORE_RUNNING: 'CORE RUNNING', CORE_HALTED: 'CORE HALTED'}
|
|
|
153 if s in statii:
|
|
|
154 return statii[s]
|
|
132
|
155 return 'Unknown status'
|
|
117
|
156
|
|
116
|
157 def reset(self):
|
|
|
158 cmd = bytearray(16)
|
|
|
159 cmd[0:2] = DEBUG_COMMAND, DEBUG_RESETSYS
|
|
|
160 self.send_recv(cmd, 2)
|
|
113
|
161
|
|
115
|
162 # debug commands:
|
|
114
|
163 def step(self):
|
|
|
164 cmd = bytearray(16)
|
|
115
|
165 cmd[0:2] = DEBUG_COMMAND, DEBUG_STEPCORE
|
|
114
|
166 self.send_recv(cmd, 2)
|
|
|
167 def run(self):
|
|
|
168 cmd = bytearray(16)
|
|
115
|
169 cmd[0:2] = DEBUG_COMMAND, DEBUG_RUNCORE
|
|
114
|
170 self.send_recv(cmd, 2)
|
|
138
|
171 def halt(self):
|
|
143
|
172 cmd = bytearray(16)
|
|
|
173 cmd[0:2] = DEBUG_COMMAND, DEBUG_FORCEDEBUG
|
|
|
174 self.send_recv(cmd, 2)
|
|
115
|
175
|
|
144
|
176 def traceEnable(self):
|
|
|
177 DEMCR = 0xE000EDFC
|
|
|
178 v = self.read_debug32(DEMCR)
|
|
|
179 v |= (1 << 24)
|
|
|
180 self.write_debug32(DEMCR, v)
|
|
|
181
|
|
114
|
182 # Helper 1 functions:
|
|
115
|
183 def write_debug32(self, address, value):
|
|
|
184 cmd = bytearray(16)
|
|
|
185 cmd[0:2] = DEBUG_COMMAND, JTAG_WRITEDEBUG_32BIT
|
|
119
|
186 cmd[2:10] = struct.pack('<II', address, value)
|
|
115
|
187 self.send_recv(cmd, 2)
|
|
114
|
188 def read_debug32(self, address):
|
|
|
189 cmd = bytearray(16)
|
|
115
|
190 cmd[0:2] = DEBUG_COMMAND, JTAG_READDEBUG_32BIT
|
|
114
|
191 cmd[2:6] = struct.pack('<I', address) # pack into u32 little endian
|
|
|
192 reply = self.send_recv(cmd, 8)
|
|
|
193 return struct.unpack('<I', reply[4:8])[0]
|
|
115
|
194 def write_reg(self, reg, value):
|
|
|
195 cmd = bytearray(16)
|
|
|
196 cmd[0:3] = DEBUG_COMMAND, DEBUG_WRITEREG, reg
|
|
|
197 cmd[3:7] = struct.pack('<I', value)
|
|
|
198 r = self.send_recv(cmd, 2)
|
|
|
199 def read_reg(self, reg):
|
|
|
200 cmd = bytearray(16)
|
|
|
201 cmd[0:3] = DEBUG_COMMAND, DEBUG_READREG, reg
|
|
|
202 reply = self.send_recv(cmd, 4)
|
|
|
203 return struct.unpack('<I', reply)[0]
|
|
124
|
204 def read_all_regs(self):
|
|
|
205 cmd = bytearray(16)
|
|
|
206 cmd[0:2] = DEBUG_COMMAND, DEBUG_READALLREGS
|
|
|
207 reply = self.send_recv(cmd, 84)
|
|
|
208 fmt = '<' + 'I' * 21 # unpack 21 register values
|
|
|
209 return list(struct.unpack(fmt, reply))
|
|
116
|
210 def write_mem32(self, address, content):
|
|
|
211 assert len(content) % 4 == 0
|
|
|
212 cmd = bytearray(16)
|
|
|
213 cmd[0:2] = DEBUG_COMMAND, DEBUG_WRITEMEM_32BIT
|
|
119
|
214 cmd[2:8] = struct.pack('<IH', address, len(content))
|
|
116
|
215 self.send_recv(cmd)
|
|
|
216 self.send_recv(content)
|
|
115
|
217 def read_mem32(self, address, length):
|
|
|
218 assert length % 4 == 0
|
|
|
219 cmd = bytearray(16)
|
|
|
220 cmd[0:2] = DEBUG_COMMAND, DEBUG_READMEM_32BIT
|
|
119
|
221 cmd[2:8] = struct.pack('<IH', address, length)
|
|
115
|
222 reply = self.send_recv(cmd, length) # expect memory back!
|
|
|
223 return reply
|
|
114
|
224
|
|
|
225 # Helper 2 functions:
|
|
|
226 def send_recv(self, tx, rxsize=0):
|
|
115
|
227 """ Helper function that transmits and receives data in bulk mode. """
|
|
114
|
228 # TODO: we could use here the non-blocking libusb api.
|
|
|
229 tx = bytes(tx)
|
|
116
|
230 #assert len(tx) == 16
|
|
114
|
231 self.devHandle.bulkWrite(2, tx) # write to endpoint 2
|
|
|
232 if rxsize > 0:
|
|
|
233 return self.devHandle.bulkRead(1, rxsize) # read from endpoint 1
|
|
|
234
|
|
|
235 if __name__ == '__main__':
|
|
|
236 # Test program
|
|
128
|
237 sl = STLink2()
|
|
114
|
238 sl.open()
|
|
132
|
239 sl.reset()
|
|
114
|
240 print('version:', sl.Version)
|
|
|
241 print('mode before doing anything:', sl.CurrentModeString)
|
|
|
242 if sl.CurrentMode == DFU_MODE:
|
|
|
243 sl.exitDfuMode()
|
|
|
244 sl.enterSwdMode()
|
|
|
245 print('mode after entering swd mode:', sl.CurrentModeString)
|
|
|
246
|
|
|
247 i = sl.ChipId
|
|
129
|
248 print('chip id: 0x{0:X}'.format(i))
|
|
114
|
249 print('cpu: {0}'.format(sl.CpuId))
|
|
|
250
|
|
117
|
251 print('status: {0}'.format(sl.StatusString))
|
|
114
|
252
|
|
115
|
253 # test registers:
|
|
124
|
254 sl.write_reg(0, 0xdeadbeef)
|
|
|
255 sl.write_reg(1, 0xcafebabe)
|
|
|
256 sl.write_reg(2, 0xc0ffee)
|
|
115
|
257 sl.write_reg(3, 0x1337)
|
|
124
|
258 sl.write_reg(5, 0x1332)
|
|
117
|
259 sl.write_reg(6, 0x12345)
|
|
115
|
260 assert sl.read_reg(3) == 0x1337
|
|
124
|
261 assert sl.read_reg(5) == 0x1332
|
|
117
|
262 assert sl.read_reg(6) == 0x12345
|
|
124
|
263 regs = sl.read_all_regs()
|
|
|
264 for i in range(len(regs)):
|
|
|
265 print('R{0}=0x{1:X}'.format(i, regs[i]))
|
|
144
|
266
|
|
|
267 # Test CoreSight registers:
|
|
|
268 idr4 = sl.read_debug32(0xE0041fd0)
|
|
|
269 print('idr4 =', idr4)
|
|
|
270
|
|
|
271 print('== ADI ==')
|
|
|
272 a = adi.Adi(sl)
|
|
|
273 a.parseRomTable(0xE00FF000) # why is rom table at 0xE00FF000?
|
|
|
274 print('== ADI ==')
|
|
|
275
|
|
|
276 # Detect ROM table:
|
|
|
277 id4 = sl.read_debug32(0xE00FFFD0)
|
|
|
278 id5 = sl.read_debug32(0xE00FFFD4)
|
|
|
279 id6 = sl.read_debug32(0xE00FFFD8)
|
|
|
280 id7 = sl.read_debug32(0xE00FFFDC)
|
|
|
281 id0 = sl.read_debug32(0xE00FFFE0)
|
|
|
282 id1 = sl.read_debug32(0xE00FFFE4)
|
|
|
283 id2 = sl.read_debug32(0xE00FFFE8)
|
|
|
284 id3 = sl.read_debug32(0xE00FFFEC)
|
|
|
285 pIDs = [id0, id1, id2, id3, id4, id5, id6, id7]
|
|
|
286 print(pIDs)
|
|
|
287
|
|
|
288 print('reading from 0xE00FF000')
|
|
|
289 scs = sl.read_debug32(0xE00FF000)
|
|
|
290 print('scs {0:08X}'.format(scs))
|
|
|
291 dwt = sl.read_debug32(0xE00FF004)
|
|
|
292 print('dwt {0:08X}'.format(dwt))
|
|
|
293 fpb = sl.read_debug32(0xE00FF008)
|
|
|
294 print('fpb {0:08X}'.format(fpb))
|
|
|
295 itm = sl.read_debug32(0xE00FF00C)
|
|
|
296 print('itm {0:08X}'.format(itm))
|
|
|
297 tpiu = sl.read_debug32(0xE00FF010)
|
|
|
298 print('tpiu {0:08X}'.format(tpiu))
|
|
|
299 etm = sl.read_debug32(0xE00FF014)
|
|
|
300 print('etm {0:08X}'.format(etm))
|
|
|
301 assert sl.read_debug32(0xE00FF018) == 0x0 # end marker
|
|
|
302
|
|
|
303 devid = sl.read_debug32(0xE0040FC8)
|
|
|
304 print('TPIU_DEVID: {0:X}'.format(devid))
|
|
|
305 devtype = sl.read_debug32(0xE0040FCC)
|
|
|
306 print('TPIU_TYPEID: {0:X}'.format(devtype))
|
|
114
|
307
|
|
|
308 sl.exitDebugMode()
|
|
|
309 print('mode at end:', sl.CurrentModeString)
|
|
|
310
|
|
|
311 sl.close()
|
|
119
|
312 print('Test succes!')
|
|
114
|
313
|
