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114
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1 import struct, time
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113
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2 from usb import UsbContext
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3
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4 class STLinkException(Exception):
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5 pass
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6
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115
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7 ST_VID, STLINK2_PID = 0x0483, 0x3748
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8
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113
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9 def checkDevice(device):
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10 return device.VendorId == ST_VID and device.ProductId == STLINK2_PID
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11
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115
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12 DFU_MODE, MASS_MODE, DEBUG_MODE = 0, 1, 2
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117
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13
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14 CORE_RUNNING = 0x80
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15 CORE_HALTED = 0x81
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16
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114
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17 # Commands:
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18 GET_VERSION = 0xf1
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19 DEBUG_COMMAND = 0xf2
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20 DFU_COMMAND = 0xf3
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21 GET_CURRENT_MODE = 0xf5
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22
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23 # dfu commands:
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24 DFU_EXIT = 0x7
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113
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25
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114
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26 # debug commands:
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27 DEBUG_ENTER = 0x20
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28 DEBUG_EXIT = 0x21
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29 DEBUG_ENTER_SWD = 0xa3
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30 DEBUG_GETSTATUS = 0x01
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116
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31 DEBUG_RESETSYS = 0x03
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115
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32 DEBUG_READREG = 0x5
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33 DEBUG_WRITEREG = 0x6
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34 DEBUG_READMEM_32BIT = 0x7
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35 DEBUG_WRITEMEM_32BIT = 0x8
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117
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36 DEBUG_RUNCORE = 0x9
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37 DEBUG_STEPCORE = 0xa
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114
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38
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115
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39 JTAG_WRITEDEBUG_32BIT = 0x35
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114
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40 JTAG_READDEBUG_32BIT = 0x36
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41
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42 # cortex M3
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43 CM3_REG_CPUID = 0xE000ED00
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44
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115
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45 # F4 specifics:
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46 STM32_FLASH_BASE = 0x08000000
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47 STM32_SRAM_BASE = 0x20000000
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48
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116
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49 FLASH_KEY1 = 0x45670123
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50 FLASH_KEY2 = 0xcdef89ab
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115
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51 # flash registers:
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116
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52 FLASH_F4_REGS_ADDR = 0x40023c00
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115
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53
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116
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54 FLASH_F4_KEYR = FLASH_F4_REGS_ADDR + +0x04
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115
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55 FLASH_F4_SR = FLASH_F4_REGS_ADDR + 0x0c
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56 FLASH_F4_CR = FLASH_F4_REGS_ADDR + 0x10
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57
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58 FLASH_F4_CR_START = 16
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59 FLASH_F4_CR_LOCK = 31
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117
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60 FLASH_CR_PG = 0
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61 FLASH_F4_CR_SER = 1
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62 FLASH_CR_MER = 2
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63 FLASH_F4_CR_SNB = 3
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64 FLASH_F4_CR_SNB_MASK = 0x38
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65 FLASH_F4_SR_BSY = 16
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66
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116
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67 # flashloaders/stm32f4.s
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68 loader_code_stm32f4 = bytes([
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69 0x07, 0x4b,
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70
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71 0x62, 0xb1,
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72 0x04, 0x68,
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73 0x0c, 0x60,
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74
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75 0xdc, 0x89,
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76 0x14, 0xf0, 0x01, 0x0f,
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77 0xfb, 0xd1,
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78 0x00, 0xf1, 0x04, 0x00,
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79 0x01, 0xf1, 0x04, 0x01,
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80 0xa2, 0xf1, 0x01, 0x02,
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81 0xf1, 0xe7,
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82
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83 0x00, 0xbe,
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84
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85 0x00, 0x3c, 0x02, 0x40
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86 ])
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87
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115
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88 def calculate_F4_sector(address):
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89 """
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90 from 0x8000000 to 0x80FFFFF
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91 4 sectors of 0x4000 (16 kB)
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92 1 sector of 0x10000 (64 kB)
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93 7 of 0x20000 (128 kB)
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94 """
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95 sectorsizes = [0x4000] * 4 + [0x10000] + [0x20000] * 7
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96 sectorstarts = []
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97 a = STM32_FLASH_BASE
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98 for sectorsize in sectorsizes:
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99 sectorstarts.append(a)
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100 a += sectorsize
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101 # linear search:
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102 sec = 0
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103 while sec < len(sectorsizes) and address >= sectorstarts[sec]:
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104 sec += 1
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105 sec -= 1 # one back.
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106 return sec, sectorsizes[sec]
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107
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108 def calcSectors(address, size):
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109 off = 0
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110 sectors = []
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111 while off < size:
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112 sectornum, sectorsize = calculate_F4_sector(address + off)
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113 #print('num: {0} size: {1:X} offset: {2}'.format(sectornum, sectorsize, off))
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114 sectors.append((sectornum, sectorsize))
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115 off += sectorsize
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116 return sectors
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117
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114
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118 class STLink:
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113
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119 def __init__(self):
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120 self.context = UsbContext()
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121 def open(self):
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122 context = UsbContext()
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123 stlink2s = list(filter(checkDevice, context.DeviceList))
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124 if not stlink2s:
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125 raise STLinkException('Could not find an ST link')
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126 if len(stlink2s) > 1:
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127 print('More then one stlink2 found, picking first one')
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128 stlink2 = stlink2s[0]
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114
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129 self.devHandle = stlink2.open()
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130 if self.devHandle.Configuration != 1:
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131 self.devHandle.Configuration = 1
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132 self.devHandle.claimInterface(0)
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116
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133
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134 # First initialization:
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135 if self.CurrentMode == DFU_MODE:
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136 self.exitDfuMode()
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137 if self.CurrentMode != DEBUG_MODE:
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138 self.enterSwdMode()
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139 self.reset()
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114
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140 def close(self):
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117
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141 # TODO
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114
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142 pass
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115
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143
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144 # modes:
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113
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145 def getCurrentMode(self):
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114
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146 cmd = bytearray(16)
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147 cmd[0] = GET_CURRENT_MODE
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148 reply = self.send_recv(cmd, 2) # Expect 2 bytes back
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149 return reply[0]
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113
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150 CurrentMode = property(getCurrentMode)
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114
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151 @property
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152 def CurrentModeString(self):
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153 modes = {DFU_MODE: 'dfu', MASS_MODE: 'massmode', DEBUG_MODE:'debug'}
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154 return modes[self.CurrentMode]
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155 def exitDfuMode(self):
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156 cmd = bytearray(16)
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115
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157 cmd[0:2] = DFU_COMMAND, DFU_EXIT
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114
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158 self.send_recv(cmd)
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159 def enterSwdMode(self):
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160 cmd = bytearray(16)
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115
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161 cmd[0:3] = DEBUG_COMMAND, DEBUG_ENTER, DEBUG_ENTER_SWD
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114
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162 self.send_recv(cmd)
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163 def exitDebugMode(self):
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164 cmd = bytearray(16)
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115
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165 cmd[0:2] = DEBUG_COMMAND, DEBUG_EXIT
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114
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166 self.send_recv(cmd)
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167
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168 def getVersion(self):
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169 cmd = bytearray(16)
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170 cmd[0] = GET_VERSION
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171 data = self.send_recv(cmd, 6) # Expect 6 bytes back
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172 # Parse 6 bytes into various versions:
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173 b0, b1, b2, b3, b4, b5 = data
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174 stlink_v = b0 >> 4
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175 jtag_v = ((b0 & 0xf) << 2) | (b1 >> 6)
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176 swim_v = b1 & 0x3f
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177 vid = (b3 << 8) | b2
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178 pid = (b5 << 8) | b4
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179
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180 return 'stlink={0} jtag={1} swim={2} vid:pid={3:04X}:{4:04X}'.format(\
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181 stlink_v, jtag_v, swim_v, vid, pid)
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182 Version = property(getVersion)
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183
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184 @property
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185 def ChipId(self):
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186 return self.read_debug32(0xE0042000)
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187 @property
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188 def CpuId(self):
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189 u32 = self.read_debug32(CM3_REG_CPUID)
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190 implementer_id = (u32 >> 24) & 0x7f
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191 variant = (u32 >> 20) & 0xf
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192 part = (u32 >> 4) & 0xfff
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193 revision = u32 & 0xf
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194 return implementer_id, variant, part, revision
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195
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117
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196 def getStatus(self):
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114
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197 cmd = bytearray(16)
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115
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198 cmd[0:2] = DEBUG_COMMAND, DEBUG_GETSTATUS
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114
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199 reply = self.send_recv(cmd, 2)
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200 return reply[0]
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117
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201 Status = property(getStatus)
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202 @property
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203 def StatusString(self):
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204 s = self.Status
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205 statii = {CORE_RUNNING: 'CORE RUNNING', CORE_HALTED: 'CORE HALTED'}
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206 if s in statii:
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207 return statii[s]
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208
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116
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209 def reset(self):
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210 cmd = bytearray(16)
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211 cmd[0:2] = DEBUG_COMMAND, DEBUG_RESETSYS
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212 self.send_recv(cmd, 2)
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113
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213
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115
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214 # debug commands:
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114
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215 def step(self):
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216 cmd = bytearray(16)
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115
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217 cmd[0:2] = DEBUG_COMMAND, DEBUG_STEPCORE
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114
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218 self.send_recv(cmd, 2)
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219 def run(self):
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220 cmd = bytearray(16)
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115
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221 cmd[0:2] = DEBUG_COMMAND, DEBUG_RUNCORE
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114
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222 self.send_recv(cmd, 2)
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115
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223
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224 # flashing commands:
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225 def writeFlash(self, address, content):
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226 # TODO:
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227 flashsize = 0x100000 # fixed 1 MB for now..
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228 print('WARNING: using 1 MB as flash size')
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229 pagesize = 0x4000 # fixed for now!
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230
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231 # Check address range:
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232 if address < STM32_FLASH_BASE:
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233 raise STLinkException('Flashing below flash start')
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234 if address + len(content) > STM32_FLASH_BASE + flashsize:
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235 raise STLinkException('Flashing above flash size')
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236 if address & 1 == 1:
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237 raise STLinkException('Unaligned flash')
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238 if len(content) & 1 == 1:
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239 print('unaligned length, padding with zero')
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240 content += bytes([0])
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241 if address & (pagesize - 1) != 0:
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242 raise STLinkException('Address not aligned with pagesize')
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114
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243
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115
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244 # erase required space
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245 sectors = calcSectors(address, len(content))
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246 print('erasing {0} sectors'.format(len(sectors)))
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247 for sector, secsize in sectors:
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248 print('erasing sector {0} of size {1}'.format(sector, secsize))
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249 self.eraseFlashSector(sector)
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250
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251 # program pages:
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116
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252 self.initFlashLoader()
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253 self.unlockFlashIf()
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117
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254 self.writeFlashCrPsiz(2)
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255 self.setFlashCrPg()
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256
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257 offset = 0
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258 while offset < len(content):
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259 size = len(content) - offset
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260 if size > 0x8000:
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261 size = 0x8000
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262
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263 self.runFlashLoader(address + offset, content[offset:offset + size])
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264 offset += size
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115
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265
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116
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266 self.lockFlash()
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267
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115
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268 # verfify program:
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269 self.verifyFlash(address, content)
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270 def eraseFlashSector(self, sector):
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271 self.waitFlashBusy()
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272 self.unlockFlashIf()
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273 self.writeFlashCrSnb(sector)
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274 self.setFlashCrStart()
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275 self.waitFlashBusy()
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276 self.lockFlash()
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116
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277 def eraseFlash(self):
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278 self.waitFlashBusy()
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279 self.unlockFlashIf()
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280 self.setFlashCrMer()
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281 self.setFlashCrStart()
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282 self.waitFlashBusy()
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283 self.clearFlashCrMer()
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284 self.lockFlash()
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115
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285 def verifyFlash(self, address, content):
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116
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286 device_content = self.readFlash(address, len(content))
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287 ok = content == device_content
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288 print('Verify:', ok)
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289 def readFlash(self, address, size):
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290 print('reading', address, size)
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115
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291 offset = 0
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116
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292 tmp_size = 0x1800
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115
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293 t1 = time.time()
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116
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294 image = bytes()
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295 while offset < size:
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115
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296 # Correct for last page:
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116
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297 if offset + tmp_size > size:
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298 tmp_size = size - offset
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115
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299
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300 # align size to 4 bytes:
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116
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301 aligned_size = tmp_size
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115
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302 while aligned_size % 4 != 0:
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303 aligned_size += 1
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304
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305 mem = self.read_mem32(address + offset, aligned_size)
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116
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306 image += mem[:tmp_size]
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115
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307
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308 # indicate progress:
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116
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309 print('.', end='', flush=True)
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115
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310
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311 # increase for next piece:
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116
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312 offset += tmp_size
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115
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313 t2 = time.time()
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116
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314 assert size == len(image)
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315 print('done! {0} bytes/second'.format(size/(t2-t1)))
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316 return image
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317 def initFlashLoader(self):
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318 # TODO: support other loader code.
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319 self.write_mem32(STM32_SRAM_BASE, loader_code_stm32f4)
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117
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320 def runFlashLoader(self, targetaddress, buf):
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321 bufAddress = STM32_SRAM_BASE + len(loader_code_stm32f4)
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322 print('running flash loader for {0} bytes'.format(len(buf)))
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323 self.write_buffer_to_sram(buf)
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324 count = int(len(buf) / 4)
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325 if len(buf) % 4 != 0: count += 1
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326 self.write_reg(0, bufAddress)
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327 self.write_reg(1, targetaddress)
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328 self.write_reg(2, count)
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329 self.write_reg(15, STM32_SRAM_BASE) # pc
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330
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331 self.run() # Let loose cpu!
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332
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333 while self.Status == CORE_RUNNING:
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334 pass
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335
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336 r2 = self.read_reg(2)
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337 if r2 != 0:
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338 raise STLinkException("write error! {0}".format(r2))
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339 def write_buffer_to_sram(self, buf):
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340 bufAddress = STM32_SRAM_BASE + len(loader_code_stm32f4)
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341 chunk = len(buf) >> 2
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342 rem = len(buf) & 0x3
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343 if chunk > 0:
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344 self.write_mem32(bufAddress, buf[:chunk])
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345 if rem > 0:
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346 self.write_mem8(bufAddress + chunk, buf[chunk:chunk+rem])
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347
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115
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348 def readFlashSr(self):
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349 return self.read_debug32(FLASH_F4_SR)
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350 def readFlashCr(self):
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351 return self.read_debug32(FLASH_F4_CR)
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352 def writeFlashCrSnb(self, sector):
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353 x = self.readFlashCr()
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354 x &= ~FLASH_F4_CR_SNB_MASK
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355 x |= sector << FLASH_F4_CR_SNB
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356 x |= 1 << FLASH_F4_CR_SER
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357 self.write_debug32(FLASH_F4_CR, x)
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116
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358 def setFlashCrMer(self):
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359 x = self.readFlashCr()
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360 x |= 1 << FLASH_CR_MER
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361 self.write_debug32(FLASH_F4_CR, x)
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117
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362 def setFlashCrPg(self):
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363 x = self.readFlashCr()
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364 x |= 1 << FLASH_CR_PG
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365 self.write_debug32(FLASH_F4_CR, x)
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366 def writeFlashCrPsiz(self, n):
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367 x = self.readFlashCr()
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368 x &= (0x3 << 8)
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369 x |= n << 8
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370 print('psiz', n)
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371 self.write_debug32(FLASH_F4_CR, x)
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116
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372 def clearFlashCrMer(self):
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373 x = self.readFlashCr()
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374 x &= ~(1 << FLASH_CR_MER)
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375 self.write_debug32(FLASH_F4_CR, x)
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115
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376 def setFlashCrStart(self):
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377 x = self.readFlashCr()
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378 x |= 1 << FLASH_F4_CR_START
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379 self.write_debug32(FLASH_F4_CR, x)
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380 def isFlashBusy(self):
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381 mask = 1 << FLASH_F4_SR_BSY
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382 sr = self.readFlashSr()
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383 return sr & mask == mask
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384 def waitFlashBusy(self):
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385 """ block until flash operation completes. """
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386 while self.isFlashBusy():
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387 pass
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388 def isFlashLocked(self):
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389 cr = self.readFlashCr()
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390 mask = 1 << FLASH_F4_CR_LOCK
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391 return cr & mask == mask
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392 def unlockFlashIf(self):
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393 if self.isFlashLocked():
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116
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394 print('unlocking')
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115
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395 self.write_debug32(FLASH_F4_KEYR, FLASH_KEY1)
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396 self.write_debug32(FLASH_F4_KEYR, FLASH_KEY2)
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397 if self.isFlashLocked():
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398 raise STLinkException('Failed to unlock')
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399 def lockFlash(self):
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116
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400 print('locking')
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401 x = self.readFlashCr() | (1 << FLASH_F4_CR_LOCK)
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402 self.write_debug32(FLASH_F4_CR, x)
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115
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403
|
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114
|
404 # Helper 1 functions:
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115
|
405 def write_debug32(self, address, value):
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406 cmd = bytearray(16)
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407 cmd[0:2] = DEBUG_COMMAND, JTAG_WRITEDEBUG_32BIT
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408 cmd[2:6] = struct.pack('<I', address)
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409 cmd[6:10] = struct.pack('<I', value)
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|
|
410 self.send_recv(cmd, 2)
|
|
114
|
411 def read_debug32(self, address):
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|
|
412 cmd = bytearray(16)
|
|
115
|
413 cmd[0:2] = DEBUG_COMMAND, JTAG_READDEBUG_32BIT
|
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114
|
414 cmd[2:6] = struct.pack('<I', address) # pack into u32 little endian
|
|
|
415 reply = self.send_recv(cmd, 8)
|
|
|
416 return struct.unpack('<I', reply[4:8])[0]
|
|
115
|
417 def write_reg(self, reg, value):
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|
|
418 cmd = bytearray(16)
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|
|
419 cmd[0:3] = DEBUG_COMMAND, DEBUG_WRITEREG, reg
|
|
|
420 cmd[3:7] = struct.pack('<I', value)
|
|
|
421 r = self.send_recv(cmd, 2)
|
|
|
422 def read_reg(self, reg):
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|
|
423 cmd = bytearray(16)
|
|
|
424 cmd[0:3] = DEBUG_COMMAND, DEBUG_READREG, reg
|
|
|
425 reply = self.send_recv(cmd, 4)
|
|
|
426 return struct.unpack('<I', reply)[0]
|
|
116
|
427 def write_mem32(self, address, content):
|
|
|
428 assert len(content) % 4 == 0
|
|
|
429 cmd = bytearray(16)
|
|
|
430 cmd[0:2] = DEBUG_COMMAND, DEBUG_WRITEMEM_32BIT
|
|
|
431 cmd[2:6] = struct.pack('<I', address)
|
|
|
432 cmd[6:8] = struct.pack('<H', len(content))
|
|
|
433 self.send_recv(cmd)
|
|
|
434 self.send_recv(content)
|
|
115
|
435 def read_mem32(self, address, length):
|
|
|
436 assert length % 4 == 0
|
|
|
437 cmd = bytearray(16)
|
|
|
438 cmd[0:2] = DEBUG_COMMAND, DEBUG_READMEM_32BIT
|
|
|
439 cmd[2:6] = struct.pack('<I', address)
|
|
|
440 cmd[6:8] = struct.pack('<H', length) # uint16
|
|
|
441 reply = self.send_recv(cmd, length) # expect memory back!
|
|
|
442 return reply
|
|
114
|
443
|
|
|
444 # Helper 2 functions:
|
|
|
445 def send_recv(self, tx, rxsize=0):
|
|
115
|
446 """ Helper function that transmits and receives data in bulk mode. """
|
|
114
|
447 # TODO: we could use here the non-blocking libusb api.
|
|
|
448 tx = bytes(tx)
|
|
116
|
449 #assert len(tx) == 16
|
|
114
|
450 self.devHandle.bulkWrite(2, tx) # write to endpoint 2
|
|
|
451 if rxsize > 0:
|
|
|
452 return self.devHandle.bulkRead(1, rxsize) # read from endpoint 1
|
|
|
453
|
|
|
454 knownChipIds = {0x1: 'x'}
|
|
|
455
|
|
|
456 if __name__ == '__main__':
|
|
|
457 # Test program
|
|
|
458 sl = STLink()
|
|
|
459 sl.open()
|
|
|
460 print('version:', sl.Version)
|
|
|
461 print('mode before doing anything:', sl.CurrentModeString)
|
|
|
462 if sl.CurrentMode == DFU_MODE:
|
|
|
463 sl.exitDfuMode()
|
|
|
464 sl.enterSwdMode()
|
|
|
465 print('mode after entering swd mode:', sl.CurrentModeString)
|
|
|
466
|
|
|
467 i = sl.ChipId
|
|
|
468 if i in knownChipIds:
|
|
|
469 print('chip id: 0x{0:X} -> {1}'.format(i, knownChipIds[i]))
|
|
|
470 else:
|
|
|
471 print('chip id: 0x{0:X}'.format(i))
|
|
|
472 print('cpu: {0}'.format(sl.CpuId))
|
|
|
473
|
|
117
|
474 print('status: {0}'.format(sl.StatusString))
|
|
114
|
475
|
|
115
|
476 #time.sleep(2.2)
|
|
|
477
|
|
|
478 # test registers:
|
|
|
479 sl.write_reg(3, 0x1337)
|
|
116
|
480 sl.write_reg(2, 0x1332)
|
|
117
|
481 sl.write_reg(6, 0x12345)
|
|
115
|
482 assert sl.read_reg(3) == 0x1337
|
|
116
|
483 assert sl.read_reg(2) == 0x1332
|
|
117
|
484 assert sl.read_reg(6) == 0x12345
|
|
114
|
485
|
|
|
486 sl.exitDebugMode()
|
|
|
487 print('mode at end:', sl.CurrentModeString)
|
|
|
488
|
|
|
489 sl.close()
|
|
|
490
|
