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404
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1
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2 ; This file contains the low level assembly code required for interrupt
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3 ; handling and virtual memory.
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340
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4
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408
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5
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385
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6 section reset
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408
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7 ; The reset vector:
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375
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8
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9 interrupt_vector_table:
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389
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10 ivt_reset: B start ; 0x0 reset
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11 ivt_undef: B undef_handler ; 0x4 undefined instruction
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12 ivt_svc: B undef_handler ; 0x08 Supervisor call
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375
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13 ivt_prefetch: B undef_handler ; 0x0C prefetch abort
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389
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14 ivt_data: B undef_handler ; 0x10 data abort
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15 ivt_hyptrap: B undef_handler ; 0x14 not used
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16 ivt_irq: B undef_handler ; 0x18 IRQ
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17 ivt_fiq: B undef_handler ; 0x18 FIQ
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375
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18
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19
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20 start:
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21
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404
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22 ; Setup the memory manager and the stack before entering kernel
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23
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406
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24 ; Output an 'A' to indicate aliveness:
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25 ldr r0, txtA
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26 ldr r1, DRreg
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27 str r0, [r1, 0]
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28
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375
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29 ; Setup TTBR1 (translation table base register)
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30
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408
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31 ldr r0, =kernel_table0 ; Load address of table
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406
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32 mcr p15, 0, r0, c2, c0, 0 ; TTBR0
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375
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33 mcr p15, 0, r0, c2, c0, 1 ; TTBR1
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34
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35 ; Prepare the TTBCR (translation table base control register)
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36 mov r0, 0x1 ; TBD: why set this to 1?
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37 mcr p15, 0, r0, c2, c0, 2
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38
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386
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39
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40 ; Set domain 0 to manager:
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41 mov r0, 3
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42 mcr p15, 0, r0, c3, c0, 0
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43
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406
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44 ldr r0, txtB
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45 ldr r1, DRreg
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46 str r0, [r1, 0]
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386
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47
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375
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48 ; Enable the VMSA (Virtual memory system architecture):
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49 mrc p15, 0, r0, c1, c0, 0
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388
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50 mov r1, 0x1
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406
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51 orr r0, r0, r1
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375
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52 mcr p15, 0, r0, c1, c0, 0
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53
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406
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54 ldr r0, txtA
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55 ldr r1, DRregmapped
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56 str r0, [r1, 0]
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57
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375
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58 ; Setup stack:
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408
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59 ldr r0, =stack_top
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60 mov sp, r0
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404
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61 BL kernel_start ; Branch to main (this is actually in the interrupt vector)
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352
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62 local_loop:
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63 B local_loop
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362
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64
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65
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375
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66 ; Interrupt handlers:
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67
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68 undef_handler:
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69 B undef_handler
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70
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381
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71
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72 ; Assembly language helpers:
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362
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73 ; Called to identify the proc:
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381
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74 arch_pfr0:
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362
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75 mrc p15, 0, r0, c0, c1, 0
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76 mov pc, lr
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77
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381
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78 arch_pfr1:
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362
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79 mrc p15, 0, r0, c0, c1, 1
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80 mov pc, lr
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81
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381
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82 arch_mmfr0:
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362
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83 mrc p15, 0, r0, c0, c1, 4
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84 mov pc, lr
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85
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381
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86 arch_mpuir:
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362
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87 mrc p15, 0, r0, c0, c0, 4
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88 mov pc, lr
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381
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89
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408
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90 arch_get_image_address:
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91 ldr r0, =ramdisk_start
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92 mov pc, lr
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93
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406
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94 ; data:
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95 txtA:
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96 dcd 65
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97 txtB:
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98 dcd 66
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99 DRreg:
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100 dcd 0x10009000
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101 DRregmapped:
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102 dcd 0x109000
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381
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103
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104 ; Memory map tables:
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105
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406
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106 ; Possibly, we are loaded into highmem at address 0x6000 0000,
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107 ; or it may as well be 0x0000 0000 as an alias.
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108 ; In any case, we must put an alias at 0x6000 0000 virtual.
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109
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381
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110 section mem_tables
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111
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112 kernel_table0:
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408
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113 dcd 0
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388
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114 dcd 0x10000402 ; Map to peripheral space 1 MB
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115 repeat 0x5FE
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386
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116 dcd 0
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117 endrepeat
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381
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118
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408
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119 dcd 0x60000402 ; Identity map this!
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388
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120
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121 repeat 0x9FF
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122 dcd 0
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123 endrepeat
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124
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408
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125 ; Create a label to indicate the ramdisk:
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126 section ramdisk
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127 ramdisk_start:
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128
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129 ; Create stack space:
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130 section stack
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131
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132 stack_bot:
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133 ds 0x1000
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134 stack_top:
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135
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