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annotate kernel/arch/qemu_vexpress/startup_a9.asm @ 386:2a970e7270e2

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Added repeat assembler macro
author Windel Bouwman
date Thu, 01 May 2014 17:40:59 +0200
parents d056b552d3f4
children e07c2a9abac1
rev   line source
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c7cc54c0dfdf Test featurebranch
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1
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2 section reset
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3
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4 interrupt_vector_table:
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5 ivt_reset: B start ; 0x0 reset
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6 ivt_undef: B undef_handler ; 0x4 undefined instruction
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7 ivt_svc: B undef_handler ; 0x08 Supervisor call
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8 ivt_prefetch: B undef_handler ; 0x0C prefetch abort
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9 ivt_data: B undef_handler ; 0x10 data abort
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10 ivt_hyptrap: B undef_handler ; 0x14 not used
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11 ivt_irq: B undef_handler ; 0x18 IRQ
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12 ivt_fiq: B undef_handler ; 0x18 FIQ
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14
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15 start:
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16
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17 ; Setup TTBR1 (translation table base register)
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18
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19 ldr r0, =kernel_table0 ; pseudo instruction which loads the value of the symbol
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20 ; -KERNEL_BASE
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21 mcr p15, 0, r0, c2, c0, 1 ; TTBR1
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22 mcr p15, 0, r0, c2, c0, 0 ; TTBR0
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23
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24 ; Prepare the TTBCR (translation table base control register)
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25 mov r0, 0x1 ; TBD: why set this to 1?
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26 mcr p15, 0, r0, c2, c0, 2
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27
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29 ; Set domain 0 to manager:
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30 mov r0, 3
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31 mcr p15, 0, r0, c3, c0, 0
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33
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34 ; Enable the VMSA (Virtual memory system architecture):
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35 mrc p15, 0, r0, c1, c0, 0
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36 ; TODO:
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37 ; mov r1, 0x1
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38 ; orr r0, r0, r1 ; TODO: implement orr r0, r0, 1
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39 mcr p15, 0, r0, c1, c0, 0
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40
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41 ; Setup stack:
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42 mov sp, 0x30000
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43 BL kernel_start ; Branch to main (this is actually in the interrupt vector)
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44 local_loop:
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45 B local_loop
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47
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48 ; Interrupt handlers:
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49
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50 undef_handler:
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51 B undef_handler
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52
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53
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54 ; Assembly language helpers:
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55 ; Called to identify the proc:
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56 arch_pfr0:
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57 mrc p15, 0, r0, c0, c1, 0
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58 ldr r0, =kernel_table0
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59 mov pc, lr
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60
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61 arch_pfr1:
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62 mrc p15, 0, r0, c0, c1, 1
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63 mov pc, lr
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64
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65 arch_mmfr0:
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66 mrc p15, 0, r0, c0, c1, 4
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67 mov pc, lr
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70 arch_mpuir:
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71 mrc p15, 0, r0, c0, c0, 4
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72 mov pc, lr
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75 ; Memory map tables:
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76
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77 section mem_tables
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78
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79 kernel_table0:
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80 dcd 0x000402 ; Identity map first 1 MB
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81 repeat 0xFFE
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82 dcd 0
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83 endrepeat
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