|
211
|
1 import ir
|
|
225
|
2 from asmnodes import ALabel, AComment
|
|
218
|
3 import cortexm3 as arm
|
|
211
|
4 from ppci import CompilerError
|
|
|
5
|
|
|
6 class ArmCodeGenerator:
|
|
219
|
7 """
|
|
|
8 Simple code generator
|
|
|
9 Ad hoc implementation
|
|
|
10 """
|
|
211
|
11 def __init__(self, out):
|
|
|
12 self.outs = out
|
|
|
13
|
|
|
14 def emit(self, item):
|
|
|
15 self.outs.emit(item)
|
|
|
16
|
|
|
17 def generate(self, ircode):
|
|
|
18 assert isinstance(ircode, ir.Module)
|
|
|
19 print('ARM code generation')
|
|
|
20 self.outs.selectSection('data')
|
|
|
21
|
|
|
22 for gvar in ircode.Variables:
|
|
|
23 self.emit(ALabel(gvar.name))
|
|
|
24 # TODO: use initial value:
|
|
|
25 self.emit(arm.dcd_ins(0))
|
|
|
26
|
|
219
|
27 self.imms = [] # list with immediates relative to PC.
|
|
211
|
28 self.outs.selectSection('code')
|
|
232
|
29
|
|
|
30 # Manually inserted startup code:
|
|
|
31 self.emit(arm.dcd_ins(0x20000678)) # initial stack ptr
|
|
|
32 self.emit(arm.dcd_ins(0x08000401)) # reset vector
|
|
|
33
|
|
211
|
34 for f in ircode.Functions:
|
|
219
|
35 # Add global variable addresses to immediate list:
|
|
|
36 for gvar in ircode.Variables:
|
|
|
37 pass #self.imms.append((
|
|
|
38
|
|
|
39 self.stack_frame = []
|
|
211
|
40 self.emit(ALabel(f.name))
|
|
218
|
41 # Save some registers:
|
|
|
42 self.emit(arm.push_ins(arm.RegisterSet({arm.r4, arm.r5, arm.r6,arm.r7,arm.lr})))
|
|
211
|
43 for bb in f.BasicBlocks:
|
|
|
44 self.emit(ALabel(bb.name))
|
|
|
45 for ins in bb.Instructions:
|
|
|
46 self.generateInstruction(ins)
|
|
|
47
|
|
219
|
48 self.outs.align(4)
|
|
|
49 while self.imms:
|
|
|
50 l, v = self.imms.pop()
|
|
|
51 self.emit(ALabel(l))
|
|
|
52 self.emit(arm.dcd_ins(v))
|
|
|
53 self.outs.align(4)
|
|
|
54
|
|
225
|
55 # Helper functions:
|
|
219
|
56 def getStack(self, v):
|
|
|
57 off = self.stack_frame.index(v)
|
|
|
58 return off * 4
|
|
|
59 def addStack(self, v):
|
|
|
60 self.stack_frame.append(v)
|
|
|
61 return self.getStack(v)
|
|
|
62 def getGlobal(self, r, g):
|
|
|
63 _global_address = g.name + '__global'
|
|
|
64 self.emit(arm.ldr_pcrel(r, ALabel(_global_address)))
|
|
225
|
65 def loadStack(self, reg, val):
|
|
|
66 self.emit(arm.ldr_sprel(reg, arm.MemSpRel(self.getStack(val))))
|
|
|
67 def comment(self, txt):
|
|
|
68 self.emit(AComment(txt))
|
|
219
|
69
|
|
211
|
70 def generateInstruction(self, ins):
|
|
232
|
71 self.comment(str(ins))
|
|
211
|
72 if type(ins) is ir.Branch:
|
|
219
|
73 tgt = ALabel(ins.target.name)
|
|
|
74 self.emit(arm.jmp_ins(tgt))
|
|
|
75 elif type(ins) is ir.ImmLoad:
|
|
|
76 lname = ins.target.name + '_ivalue'
|
|
|
77 self.emit(arm.ldr_pcrel(arm.r0, ALabel(lname)))
|
|
|
78 self.imms.append((lname, ins.value))
|
|
225
|
79 self.emit(arm.str_sprel(arm.r0, arm.MemSpRel(self.addStack(ins.target))))
|
|
211
|
80 elif type(ins) is ir.Store:
|
|
219
|
81 # Load value in r0:
|
|
225
|
82 self.loadStack(arm.r0, ins.value)
|
|
219
|
83 # store in memory:
|
|
232
|
84 # TODO: split globals and locals??
|
|
|
85 #self.getGlobal(arm.r1, ins.location)
|
|
|
86 self.loadStack(arm.r1, ins.location)
|
|
225
|
87 self.emit(arm.storeimm5_ins(arm.r0, arm.MemR8Rel(arm.r1, 0)))
|
|
211
|
88 elif type(ins) is ir.Load:
|
|
232
|
89 # TODO: differ global and local??
|
|
|
90 #self.getGlobal(arm.r0, ins.location)
|
|
|
91 self.loadStack(arm.r0, ins.location)
|
|
225
|
92 self.emit(arm.loadimm5_ins(arm.r0, arm.MemR8Rel(arm.r0, 0)))
|
|
219
|
93 # Store value on stack:
|
|
225
|
94 self.emit(arm.str_sprel(arm.r0, arm.MemSpRel(self.addStack(ins.value))))
|
|
211
|
95 elif type(ins) is ir.BinaryOperator:
|
|
219
|
96 # Load operands:
|
|
225
|
97 self.loadStack(arm.r0, ins.value1)
|
|
|
98 self.loadStack(arm.r1, ins.value2)
|
|
219
|
99 # do operation:
|
|
|
100 if ins.operation == '+':
|
|
|
101 self.emit(arm.addregs_ins(arm.r0, arm.r0, arm.r1))
|
|
232
|
102 elif ins.operation == '<<':
|
|
|
103 self.emit(arm.lslregs_ins(arm.r0, arm.r1))
|
|
|
104 elif ins.operation == '|':
|
|
|
105 self.emit(arm.orrregs_ins(arm.r0, arm.r1))
|
|
219
|
106 else:
|
|
|
107 print('operation not implemented', ins.operation)
|
|
|
108 # Store value back:
|
|
225
|
109 self.emit(arm.str_sprel(arm.r0, arm.MemSpRel(self.addStack(ins.result))))
|
|
219
|
110 elif type(ins) is ir.Return:
|
|
|
111 self.emit(arm.pop_ins(arm.RegisterSet({arm.r4, arm.r5, arm.r6, arm.r7, arm.pc})))
|
|
212
|
112 elif type(ins) is ir.ConditionalBranch:
|
|
225
|
113 self.loadStack(arm.r0, ins.a)
|
|
|
114 self.loadStack(arm.r1, ins.b)
|
|
218
|
115 self.emit(arm.cmp_ins(arm.r1, arm.r0))
|
|
219
|
116 tgt_yes = ALabel(ins.lab1.name)
|
|
|
117 if ins.cond == '==':
|
|
|
118 self.emit(arm.beq_ins(tgt_yes))
|
|
|
119 else:
|
|
|
120 print('TODO', ins.cond)
|
|
|
121 tgt_no = ALabel(ins.lab2.name)
|
|
|
122 self.emit(arm.jmp_ins(tgt_no))
|
|
222
|
123 elif type(ins) is ir.Alloc:
|
|
232
|
124 # Local variables are added to stack
|
|
222
|
125 self.addStack(ins.value)
|
|
211
|
126 else:
|
|
|
127 raise CompilerError('IR "{}" not covered'.format(ins))
|
|
|
128
|
|
|
129
|
