changeset 211:99164160fb0b

Added another missing file
author Windel Bouwman
date Sat, 29 Jun 2013 10:10:45 +0200
parents 67b0feafe5ae
children 62386bcee1ba
files python/codegenarm.py
diffstat 1 files changed, 50 insertions(+), 0 deletions(-) [+]
line wrap: on
line diff
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/python/codegenarm.py	Sat Jun 29 10:10:45 2013 +0200
@@ -0,0 +1,50 @@
+import ir
+from asmnodes import ALabel
+import arm_cm3 as arm
+from ppci import CompilerError
+
+class ArmCodeGenerator:
+    """ Simple code generator """
+    def __init__(self, out):
+        self.outs = out
+
+    def emit(self, item):
+        self.outs.emit(item)
+
+    def generate(self, ircode):
+        assert isinstance(ircode, ir.Module)
+        print('ARM code generation')
+        self.outs.selectSection('data')
+
+        for gvar in ircode.Variables:
+            self.emit(ALabel(gvar.name))
+            # TODO: use initial value:
+            self.emit(arm.dcd_ins(0))
+
+        self.outs.selectSection('code')
+        for f in ircode.Functions:
+            self.emit(ALabel(f.name))
+            self.emit(arm.push_ins(arm.RegisterSet({arm.r2, arm.r3,arm.lr})))
+            for bb in f.BasicBlocks:
+                self.emit(ALabel(bb.name))
+                for ins in bb.Instructions:
+                    self.generateInstruction(ins)
+
+    def generateInstruction(self, ins):
+        if type(ins) is ir.Branch:
+            self.emit(arm.jmp_ins(ins.target))
+        elif type(ins) is ir.ImmLoad and ins.value < 255:
+            self.emit(arm.mov_ins(arm.r0, arm.Imm8(ins.value)))
+        elif type(ins) is ir.Store:
+            print(ins)
+        elif type(ins) is ir.Return:
+            self.emit(arm.pop_ins(arm.RegisterSet({arm.r2, arm.r3, arm.pc})))
+        elif type(ins) is ir.Load:
+            print(ins)
+        elif type(ins) is ir.BinaryOperator:
+            print(ins)
+        else:
+            print(ins)
+            raise CompilerError('IR "{}" not covered'.format(ins))
+
+