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1 #!/usr/bin/python
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2
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199
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3 import unittest, cProfile
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200
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4 from ppci import CompilerError
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201
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5 from asmnodes import AInstruction, ABinop, AUnop, ASymbol, ALabel, ANumber
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6 from asm import tokenize, Assembler
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236
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7 import outstream
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8 from target import Label
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191
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9
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290
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10
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198
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11 class AssemblerLexingCase(unittest.TestCase):
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12 """ Tests the assemblers lexer """
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13
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14 def testLex0(self):
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15 """ Check if the lexer is OK """
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318
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16 asmline, toks = 'mov rax, rbx ', ['ID', 'ID', ',', 'ID', 'EOF']
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17 self.assertSequenceEqual([tok.typ for tok in tokenize(asmline)], toks)
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18
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19 def testLex1(self):
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193
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20 """ Test if lexer correctly maps some tokens """
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318
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21 asmline, toks = 'lab1: mov rax, rbx ', ['ID', ':', 'ID', 'ID', ',', 'ID', 'EOF']
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22 self.assertSequenceEqual([tok.typ for tok in tokenize(asmline)], toks)
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23
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24 def testLex2(self):
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318
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25 """ Test if lexer correctly maps some tokens """
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26 asmline, toks = 'mov 3.13 0xC 13', ['ID', 'REAL', 'NUMBER', 'NUMBER', 'EOF']
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27 self.assertSequenceEqual([tok.typ for tok in tokenize(asmline)], toks)
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28
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29 def testLex3(self):
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193
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30 """ Test if lexer fails on a token that is invalid """
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191
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31 asmline = '0z4: mov rax, rbx $ '
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200
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32 with self.assertRaises(CompilerError):
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198
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33 list(tokenize(asmline))
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34
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290
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35
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36 class AssemblerParsingTestCase(unittest.TestCase):
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37 """
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38 Tests the assembler parts
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39 """
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199
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40 def setUp(self):
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41 self.a = Assembler()
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42
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43 def testParse(self):
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44 asmline = 'lab1: mov rax, rbx'
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45 self.a.parse_line(asmline)
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46
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47 def expectTree(self, asmline, stack):
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48 self.a.parse_line(asmline)
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49 self.assertSequenceEqual(stack, self.a.stack)
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50
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51 def testParse2(self):
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52 asmline = 'a: mov rax, [rbx + 2]'
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53 output = []
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54 output.append(ALabel('a'))
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55 output.append(AInstruction('mov', [ASymbol('rax'), AUnop('[]', ASymbol('rbx') + ANumber(2))]))
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56 self.expectTree(asmline, output)
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57
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58 def testParse3(self):
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59 # A label must be optional:
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60 asmline = 'mov rax, 1'
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61 output = [AInstruction('mov', [ASymbol('rax'), ANumber(1)])]
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62 self.expectTree(asmline, output)
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63
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64 def testParse4(self):
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65 # Test 3 operands:
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66 asmline = 'add rax, [4*rbx + 22], rcx'
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67 ops = []
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68 ops.append(ASymbol('rax'))
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69 ops.append(AUnop('[]', ANumber(4) * ASymbol('rbx') + ANumber(22)))
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70 ops.append(ASymbol('rcx'))
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71 output = [AInstruction('add', ops)]
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72 self.expectTree(asmline, output)
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73
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74 def testParse5(self):
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75 # An instruction must be optional:
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76 asmline = 'lab1:'
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77 output = []
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78 output.append(ALabel('lab1'))
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79 self.expectTree(asmline, output)
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80
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81 def testParse6(self):
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82 # A line can be empty
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83 self.a.parse_line('')
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84
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292
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85
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86 class AssemblerOtherTestCase(unittest.TestCase):
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200
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87 def testWithoutTarget(self):
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88 a = Assembler()
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89 with self.assertRaises(CompilerError):
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90 a.assemble_line('')
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91
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236
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92
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93 class OustreamTestCase(unittest.TestCase):
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94 def test1(self):
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95 o = outstream.BinOutputStream()
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96 o.selectSection('.text')
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97 o.emit(Label('a'))
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98 self.assertSequenceEqual(bytes(), o.Data)
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99
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100
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101 class AsmTestCaseBase(unittest.TestCase):
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292
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102 """ Base testcase for assembly """
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103 def feed(self, line):
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104 self.a.assemble(line)
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105
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106 def check(self, hexstr):
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107 self.assertSequenceEqual(bytes.fromhex(hexstr), self.o.Data)
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108
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109
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191
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110 if __name__ == '__main__':
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111 unittest.main()
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