annotate test/testasm.py @ 352:899ae3aea803

First kernel run for vexpressA9
author Windel Bouwman
date Sun, 09 Mar 2014 11:55:55 +0100
parents 442fb043d149
children 6df89163e114
rev   line source
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1 #!/usr/bin/python
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2
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3 import unittest
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4 from ppci import CompilerError
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5 from ppci.assembler import tokenize, Assembler, Lexer
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6 from ppci.objectfile import ObjectFile
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7 from ppci.linker import Linker
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8 from ppci.outstream import BinaryOutputStream
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9 from ppci.target.basetarget import Label
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10
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11
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12 class AssemblerLexingCase(unittest.TestCase):
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13 """ Tests the assemblers lexer """
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14
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15 def testLex0(self):
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16 """ Check if the lexer is OK """
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17 asmline, toks = 'mov rax, rbx ', ['ID', 'ID', ',', 'ID', 'EOF']
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18 self.assertSequenceEqual([tok.typ for tok in tokenize(asmline, [])], toks)
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20 def testLex1(self):
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21 """ Test if lexer correctly maps some tokens """
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22 asmline, toks = 'lab1: mov rax, rbx ', ['ID', ':', 'ID', 'ID', ',', 'ID', 'EOF']
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23 self.assertSequenceEqual([tok.typ for tok in tokenize(asmline, [])], toks)
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24
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25 def testLex2(self):
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26 """ Test if lexer correctly maps some tokens """
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27 asmline, toks = 'mov 3.13 0xC 13', ['ID', 'REAL', 'val5', 'val5', 'EOF']
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28 self.assertSequenceEqual([tok.typ for tok in tokenize(asmline, [])], toks)
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29
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30 def testLex3(self):
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31 """ Test if lexer fails on a token that is invalid """
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32 asmline = '0z4: mov rax, rbx $ '
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33 with self.assertRaises(CompilerError):
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34 list(tokenize(asmline, []))
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35
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36
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37 class AssemblerParsingTestCase(unittest.TestCase):
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38 """
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39 Tests the assembler parts
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40 """
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41 def setUp(self):
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42 self.skipTest('refactoring asm parser')
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43 self.parser = asmParser
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44 self.stack = []
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45
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46 def emit(self, x):
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47 self.stack.append(x)
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48
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49 def parse_line(self, line):
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50 self.parser.parse(Lexer(line), self.emit)
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51
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52 def testParse(self):
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53 asmline = 'lab1: mov rax, rbx'
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54 self.parse_line(asmline)
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55
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56 def expectTree(self, asmline, stack):
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57 self.parse_line(asmline)
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58 self.assertSequenceEqual(stack, self.stack)
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59
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60 def testParse2(self):
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61 asmline = 'a: mov rax, [rbx + 2]'
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62 output = []
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63 output.append(ALabel('a'))
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64 output.append(AInstruction('mov', [ASymbol('rax'), AUnop('[]', ASymbol('rbx') + ANumber(2))]))
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65 self.expectTree(asmline, output)
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66
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67 def testParse3(self):
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68 # A label must be optional:
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69 asmline = 'mov rax, 1'
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70 output = [AInstruction('mov', [ASymbol('rax'), ANumber(1)])]
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71 self.expectTree(asmline, output)
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73 def testParse4(self):
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74 # Test 3 operands:
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75 asmline = 'add rax, [4*rbx + 22], rcx'
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76 ops = []
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77 ops.append(ASymbol('rax'))
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78 ops.append(AUnop('[]', ANumber(4) * ASymbol('rbx') + ANumber(22)))
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79 ops.append(ASymbol('rcx'))
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80 output = [AInstruction('add', ops)]
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81 self.expectTree(asmline, output)
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82
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83 def testParse5(self):
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84 # An instruction must be optional:
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85 asmline = 'lab1:'
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86 output = []
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87 output.append(ALabel('lab1'))
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88 self.expectTree(asmline, output)
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90 def testParse6(self):
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91 # A line can be empty
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92 self.parse_line('')
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95 class OustreamTestCase(unittest.TestCase):
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96 def test1(self):
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97 obj = ObjectFile()
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98 o = BinaryOutputStream(obj)
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99 o.select_section('.text')
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100 o.emit(Label('a'))
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101 self.assertSequenceEqual(bytes(), obj.get_section('.text').data)
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102
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103
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104 class AsmTestCaseBase(unittest.TestCase):
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105 """ Base testcase for assembly """
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106 def feed(self, line):
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107 self.a.assemble(line, self.ostream)
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108
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109 def check(self, hexstr):
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110 l = Linker()
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111 self.obj = l.link([self.obj])
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112 data = bytes(self.obj.get_section('.text').data)
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113 self.assertSequenceEqual(bytes.fromhex(hexstr), data)
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115
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116 if __name__ == '__main__':
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117 unittest.main()