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1 import ir
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2 from asmnodes import ALabel
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3 import cortexm3 as arm
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4 from ppci import CompilerError
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5
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6 class ArmCodeGenerator:
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7 """
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8 Simple code generator
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9 Ad hoc implementation
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10 """
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11 def __init__(self, out):
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12 self.outs = out
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13
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14 def emit(self, item):
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15 self.outs.emit(item)
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16
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17 def generate(self, ircode):
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18 assert isinstance(ircode, ir.Module)
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19 print('ARM code generation')
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20 self.outs.selectSection('data')
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21
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22 for gvar in ircode.Variables:
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23 self.emit(ALabel(gvar.name))
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24 # TODO: use initial value:
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25 self.emit(arm.dcd_ins(0))
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26
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27 self.imms = [] # list with immediates relative to PC.
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28 self.outs.selectSection('code')
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29 for f in ircode.Functions:
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30 # Add global variable addresses to immediate list:
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31 for gvar in ircode.Variables:
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32 pass #self.imms.append((
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33
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34 self.stack_frame = []
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35 self.emit(ALabel(f.name))
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36 # Save some registers:
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37 self.emit(arm.push_ins(arm.RegisterSet({arm.r4, arm.r5, arm.r6,arm.r7,arm.lr})))
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38 for bb in f.BasicBlocks:
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39 self.emit(ALabel(bb.name))
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40 for ins in bb.Instructions:
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41 self.generateInstruction(ins)
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42
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43 self.outs.align(4)
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44 while self.imms:
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45 l, v = self.imms.pop()
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46 self.emit(ALabel(l))
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47 self.emit(arm.dcd_ins(v))
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48 self.outs.align(4)
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49
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50 def getStack(self, v):
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51 off = self.stack_frame.index(v)
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52 return off * 4
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53 def addStack(self, v):
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54 self.stack_frame.append(v)
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55 return self.getStack(v)
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56 def getGlobal(self, r, g):
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57 _global_address = g.name + '__global'
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58 self.emit(arm.ldr_pcrel(r, ALabel(_global_address)))
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59
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60 def generateInstruction(self, ins):
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61 if type(ins) is ir.Branch:
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62 tgt = ALabel(ins.target.name)
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63 self.emit(arm.jmp_ins(tgt))
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64 elif type(ins) is ir.ImmLoad:
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65 lname = ins.target.name + '_ivalue'
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66 self.emit(arm.ldr_pcrel(arm.r0, ALabel(lname)))
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67 self.imms.append((lname, ins.value))
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68 self.emit(arm.str_sprel(arm.r0, arm.MemoryOp(arm.sp, self.addStack(ins.target))))
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69 elif type(ins) is ir.Store:
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70 # Load value in r0:
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71 self.emit(arm.ldr_sprel(arm.r0, arm.MemoryOp(arm.sp, self.getStack(ins.value))))
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72 # store in memory:
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73 self.getGlobal(arm.r1, ins.location)
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74 self.emit(arm.storeimm5_ins(arm.r0, arm.MemoryOp(arm.r1, 0)))
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75 elif type(ins) is ir.Load:
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76 self.getGlobal(arm.r0, ins.location)
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77 self.emit(arm.loadimm5_ins(arm.r0, arm.MemoryOp(arm.r0, 0)))
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78 # Store value on stack:
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79 self.emit(arm.str_sprel(arm.r0, arm.MemoryOp(arm.sp, self.addStack(ins.value))))
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80 elif type(ins) is ir.BinaryOperator:
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81 # Load operands:
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82 self.emit(arm.ldr_sprel(arm.r0, arm.MemoryOp(arm.sp, self.getStack(ins.value1))))
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83 self.emit(arm.ldr_sprel(arm.r1, arm.MemoryOp(arm.sp, self.getStack(ins.value2))))
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84 # do operation:
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85 if ins.operation == '+':
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86 self.emit(arm.addregs_ins(arm.r0, arm.r0, arm.r1))
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87 else:
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88 print('operation not implemented', ins.operation)
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89 # Store value back:
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90 self.emit(arm.str_sprel(arm.r0, arm.MemoryOp(arm.sp, self.addStack(ins.result))))
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91 elif type(ins) is ir.Return:
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92 self.emit(arm.pop_ins(arm.RegisterSet({arm.r4, arm.r5, arm.r6, arm.r7, arm.pc})))
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93 elif type(ins) is ir.ConditionalBranch:
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94 self.emit(arm.ldr_sprel(arm.r0, arm.MemoryOp(arm.sp, self.getStack(ins.a))))
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95 self.emit(arm.ldr_sprel(arm.r1, arm.MemoryOp(arm.sp, self.getStack(ins.b))))
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96 self.emit(arm.cmp_ins(arm.r1, arm.r0))
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97 tgt_yes = ALabel(ins.lab1.name)
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98 if ins.cond == '==':
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99 self.emit(arm.beq_ins(tgt_yes))
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100 else:
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101 print('TODO', ins.cond)
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102 tgt_no = ALabel(ins.lab2.name)
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103 self.emit(arm.jmp_ins(tgt_no))
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104 elif type(ins) is ir.Alloc:
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105 self.addStack(ins.value)
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106 else:
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107 raise CompilerError('IR "{}" not covered'.format(ins))
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108
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