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342
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1
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364
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2 from ..basetarget import Target, Label
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345
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3 from ..arm.registers import R0, R1, R2, R3, R4, R5, R6, R7
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4 from ..arm.registers import R8, R9, R10, R11, R12, SP, LR, PC
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342
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5 from ..arm.registers import register_range
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6
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359
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7 from .instructions import Dcd, Mov, Mov1, Add, Add2, Sub, Orr1, Mul, Mov2, Add1, Mul1
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356
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8 from .instructions import Lsr1, Lsl1, And1, Sub1
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352
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9 from .instructions import B, Bl, Ble, Bgt, Beq, Blt, Cmp, Cmp2
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354
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10 from .instructions import Push, Pop, Str, Ldr, Ldr3, Str1, Ldr1, Adr
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362
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11 from .instructions import Mcr, Mrc
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375
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12 from .instructions import LdrPseudo
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346
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13 from .selector import ArmInstructionSelector
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14 from .frame import ArmFrame
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381
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15 from ...assembler import BaseAssembler
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16
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17
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18 class ArmAssembler(BaseAssembler):
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19 def __init__(self, target):
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20 super().__init__(target)
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21 self.target.add_keyword('section')
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22 self.target.add_instruction(['section', 'ID'],
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23 lambda rhs: self.select_section(rhs[1].val))
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386
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24 self.target.add_keyword('repeat')
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25 self.target.add_keyword('endrepeat')
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26 self.target.add_instruction(['repeat', 'imm32'], self.begin_repeat)
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27 self.target.add_instruction(['endrepeat'], self.end_repeat)
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28
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381
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29 self.make_parser()
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30 self.lit_pool = []
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31 self.lit_counter = 0
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386
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32 self.inMacro = False
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33
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34 def prepare(self):
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35 self.inMacro = False
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36
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37 def begin_repeat(self, rhs):
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38 if self.inMacro:
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39 raise Exception()
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40 self.inMacro = True
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41 self.rep_count = rhs[1]
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42 self.recording = []
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43
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44 def end_repeat(self, rhs):
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45 if not self.inMacro:
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46 raise Exception()
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47 self.inMacro = False
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48 for rec in self.recording * self.rep_count:
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49 self.emit(*rec)
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50
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51 def emit(self, *args):
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52 if self.inMacro:
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53 self.recording.append(args)
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54 else:
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55 super().emit(*args)
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381
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56
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57 def select_section(self, name):
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58 self.flush()
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59 self.stream.select_section(name)
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60
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61 def flush(self):
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386
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62 if self.inMacro:
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63 raise Exception()
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381
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64 while self.lit_pool:
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65 i = self.lit_pool.pop(0)
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66 self.emit(i)
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67
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68 def add_literal(self, v):
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69 """ For use in the pseudo instruction LDR r0, =SOMESYM """
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70 # Invent some label for the literal and store it.
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71 self.lit_counter += 1
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72 label_name = "_lit_{}".format(self.lit_counter)
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73 self.lit_pool.append(Label(label_name))
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74 self.lit_pool.append(Dcd(v))
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75 return label_name
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342
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76
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386
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77
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345
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78 class ArmTarget(Target):
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342
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79 def __init__(self):
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346
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80 super().__init__('arm')
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81 self.make_parser()
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82 self.ins_sel = ArmInstructionSelector()
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83 self.FrameClass = ArmFrame
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381
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84 self.assembler = ArmAssembler(self)
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342
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85
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346
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86 self.add_lowering(Ldr3, lambda im: Ldr3(im.dst[0], im.others[0]))
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87 self.add_lowering(Str1, lambda im: Str1(im.src[1], im.src[0], im.others[0]))
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88 self.add_lowering(Ldr1, lambda im: Ldr1(im.dst[0], im.src[0], im.others[0]))
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354
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89 self.add_lowering(Adr, lambda im: Adr(im.dst[0], im.others[0]))
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346
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90 self.add_lowering(Mov2, lambda im: Mov2(im.dst[0], im.src[0]))
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352
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91 self.add_lowering(Cmp2, lambda im: Cmp2(im.src[0], im.src[1]))
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92 self.add_lowering(Add1, lambda im: Add1(im.dst[0], im.src[0], im.src[1]))
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359
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93 self.add_lowering(Add2, lambda im: Add2(im.dst[0], im.src[0], im.others[0]))
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356
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94 self.add_lowering(Sub1, lambda im: Sub1(im.dst[0], im.src[0], im.src[1]))
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354
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95 self.add_lowering(Mul1, lambda im: Mul1(im.dst[0], im.src[0], im.src[1]))
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356
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96 self.add_lowering(Lsr1, lambda im: Lsr1(im.dst[0], im.src[0], im.src[1]))
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97 self.add_lowering(And1, lambda im: And1(im.dst[0], im.src[0], im.src[1]))
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357
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98 self.add_lowering(Mov1, lambda im: Mov1(im.dst[0], im.others[0]))
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346
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99
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364
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100 def emit_global(self, outs, lname):
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101 outs.emit(Label(lname))
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102 outs.emit(Dcd(0))
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103
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381
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104
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346
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105 def make_parser(self):
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342
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106 # Assembly grammar:
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107 self.add_keyword('r0')
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108 self.add_keyword('r1')
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109 self.add_keyword('r2')
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110 self.add_keyword('r3')
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111 self.add_keyword('r4')
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112 self.add_keyword('r5')
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113 self.add_keyword('r6')
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114 self.add_keyword('r7')
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345
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115 self.add_keyword('r8')
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116 self.add_keyword('r9')
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117 self.add_keyword('r10')
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118 self.add_keyword('r11')
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119 self.add_keyword('r12')
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346
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120 self.add_keyword('sp')
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121 self.add_keyword('lr')
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122 self.add_keyword('pc')
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342
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123
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124 self.add_rule('reg', ['r0'], lambda rhs: R0)
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125 self.add_rule('reg', ['r1'], lambda rhs: R1)
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126 self.add_rule('reg', ['r2'], lambda rhs: R2)
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127 self.add_rule('reg', ['r3'], lambda rhs: R3)
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128 self.add_rule('reg', ['r4'], lambda rhs: R4)
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129 self.add_rule('reg', ['r5'], lambda rhs: R5)
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130 self.add_rule('reg', ['r6'], lambda rhs: R6)
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131 self.add_rule('reg', ['r7'], lambda rhs: R7)
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345
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132 self.add_rule('reg', ['r8'], lambda rhs: R8)
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133 self.add_rule('reg', ['r9'], lambda rhs: R9)
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134 self.add_rule('reg', ['r10'], lambda rhs: R10)
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135 self.add_rule('reg', ['r11'], lambda rhs: R11)
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136 self.add_rule('reg', ['r12'], lambda rhs: R12)
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137 self.add_rule('reg', ['sp'], lambda rhs: SP)
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138 self.add_rule('reg', ['lr'], lambda rhs: LR)
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139 self.add_rule('reg', ['pc'], lambda rhs: PC)
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140
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141 self.add_keyword('dcd')
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142 self.add_instruction(['dcd', 'imm32'],
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143 lambda rhs: Dcd(rhs[1]))
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144
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145 self.add_keyword('mov')
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146 self.add_instruction(['mov', 'reg', ',', 'imm32'],
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342
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147 lambda rhs: Mov(rhs[1], rhs[3]))
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148 self.add_instruction(['mov', 'reg', ',', 'reg'],
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149 lambda rhs: Mov(rhs[1], rhs[3]))
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150
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352
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151 self.add_keyword('cmp')
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152 self.add_instruction(['cmp', 'reg', ',', 'imm32'],
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153 lambda rhs: Cmp(rhs[1], rhs[3]))
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154 self.add_instruction(['cmp', 'reg', ',', 'reg'],
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155 lambda rhs: Cmp(rhs[1], rhs[3]))
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156
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157 # Arithmatic:
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158 self.add_keyword('add')
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159 self.add_instruction(['add', 'reg', ',', 'reg', ',', 'imm32'],
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160 lambda rhs: Add(rhs[1], rhs[3], rhs[5]))
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161
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162 self.add_instruction(['add', 'reg', ',', 'reg', ',', 'reg'],
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163 lambda rhs: Add(rhs[1], rhs[3], rhs[5]))
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164
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165 self.add_keyword('sub')
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166 self.add_instruction(['sub', 'reg', ',', 'reg', ',', 'imm32'],
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167 lambda rhs: Sub(rhs[1], rhs[3], rhs[5]))
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168
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169 self.add_instruction(['sub', 'reg', ',', 'reg', ',', 'reg'],
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170 lambda rhs: Sub(rhs[1], rhs[3], rhs[5]))
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171
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346
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172 self.add_keyword('mul')
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173 self.add_instruction(['mul', 'reg', ',', 'reg', ',', 'reg'],
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174 lambda rhs: Mul(rhs[1], rhs[3], rhs[5]))
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175
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345
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176 self.add_keyword('orr')
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177 self.add_instruction(['orr', 'reg', ',', 'reg', ',', 'reg'],
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178 lambda rhs: Orr1(rhs[1], rhs[3], rhs[5]))
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179
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356
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180 self.add_keyword('and')
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181 self.add_instruction(['and', 'reg', ',', 'reg', ',', 'reg'],
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182 lambda rhs: And1(rhs[1], rhs[3], rhs[5]))
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183
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184 self.add_keyword('lsr')
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185 self.add_instruction(['lsr', 'reg', ',', 'reg', ',', 'reg'],
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186 lambda rhs: Lsr1(rhs[1], rhs[3], rhs[5]))
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187
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188 self.add_keyword('lsl')
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189 self.add_instruction(['lsl', 'reg', ',', 'reg', ',', 'reg'],
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190 lambda rhs: Lsl1(rhs[1], rhs[3], rhs[5]))
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191
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192
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193 # Jumping:
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194 self.add_keyword('b')
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195 self.add_instruction(['b', 'ID'], lambda rhs: B(rhs[1].val))
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196 self.add_keyword('ble')
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197 self.add_instruction(['ble', 'ID'], lambda rhs: Ble(rhs[1].val))
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198 self.add_keyword('bgt')
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199 self.add_instruction(['bgt', 'ID'], lambda rhs: Bgt(rhs[1].val))
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200 self.add_keyword('beq')
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201 self.add_instruction(['beq', 'ID'], lambda rhs: Beq(rhs[1].val))
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346
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202 self.add_keyword('blt')
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203 self.add_instruction(['blt', 'ID'], lambda rhs: Blt(rhs[1].val))
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345
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204
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205 self.add_keyword('bl')
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206 self.add_instruction(['bl', 'ID'], lambda rhs: Bl(rhs[1].val))
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346
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207
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208 # memory:
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209 self.add_keyword('pop')
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210 self.add_instruction(['pop', 'reg_list'], lambda rhs: Pop(rhs[1]))
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211
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212 self.add_keyword('push')
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213 self.add_instruction(['push', 'reg_list'], lambda rhs: Push(rhs[1]))
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214
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215 self.add_keyword('ldr')
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216 self.add_instruction(['ldr', 'reg', ',', '[', 'reg', ',', 'imm8', ']'],
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217 lambda rhs: Ldr(rhs[1], rhs[4], rhs[6]))
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218
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350
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219 self.add_instruction(['ldr', 'reg', ',', 'ID'],
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220 lambda rhs: Ldr(rhs[1], rhs[3].val))
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221
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222 # This is a pseudo instruction:
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223 self.add_instruction(['ldr', 'reg', ',', '=', 'ID'],
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224 lambda rhs: LdrPseudo(rhs[1], rhs[4].val, self.assembler.add_literal))
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225
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346
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226 self.add_keyword('str')
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227 self.add_instruction(['str', 'reg', ',', '[', 'reg', ',', 'imm8', ']'],
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228 lambda rhs: Str(rhs[1], rhs[4], rhs[6]))
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229
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230 self.add_instruction(['str', 'reg', ',', '[', 'reg', ',', 'reg', ']'],
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231 lambda rhs: Str(rhs[1], rhs[4], rhs[6]))
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232
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233 self.add_keyword('adr')
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234 self.add_instruction(['adr', 'reg', ',', 'ID'],
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235 lambda rhs: Adr(rhs[1], rhs[3].val))
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236
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375
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237
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346
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238 # Register list grammar:
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239 self.add_rule('reg_list', ['{', 'reg_list_inner', '}'],
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240 lambda rhs: rhs[1])
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241 self.add_rule('reg_list_inner', ['reg_or_range'],
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242 lambda rhs: rhs[0])
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243 self.add_rule('reg_list_inner', ['reg_or_range', ',', 'reg_list_inner'],
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244 lambda rhs: rhs[0] | rhs[2])
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245 self.add_rule('reg_or_range', ['reg'], lambda rhs: {rhs[0]})
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246
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247 self.add_rule('reg_or_range', ['reg', '-', 'reg'],
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248 lambda rhs: register_range(rhs[0], rhs[2]))
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362
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249
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250 # Add MCR and MRC (co-processor)
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251 for i in range(16):
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252 creg = 'c{}'.format(i)
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253 self.add_keyword(creg)
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254 self.add_rule('coreg', [creg], i)
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255
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256 for i in range(8, 16):
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257 px = 'p{}'.format(i)
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258 self.add_keyword(px)
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259 # Ran into trouble when using i inside lambda function:
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260 # When using inside lambda (as a closure), i is bound to the latest
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261 # value (15)
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262 self.add_rule('coproc', [px], i)
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263
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264 self.add_keyword('mcr')
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265 self.add_instruction(['mcr', 'coproc', ',', 'imm3', ',', 'reg', ',', 'coreg', ',', 'coreg', ',', 'imm3'],
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266 lambda rhs: Mcr(rhs[1], rhs[3], rhs[5], rhs[7], rhs[9], rhs[11]))
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267
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268 self.add_keyword('mrc')
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269 self.add_instruction(['mrc', 'coproc', ',', 'imm3', ',', 'reg', ',', 'coreg', ',', 'coreg', ',', 'imm3'],
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270 lambda rhs: Mrc(rhs[1], rhs[3], rhs[5], rhs[7], rhs[9], rhs[11]))
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