--- a/python/ppci/target/arm/__init__.py	Sun Mar 09 18:49:10 2014 +0100
+++ b/python/ppci/target/arm/__init__.py	Thu Mar 13 18:59:06 2014 +0100
@@ -4,9 +4,9 @@
 from ..arm.registers import R8, R9, R10, R11, R12, SP, LR, PC
 from ..arm.registers import register_range
 
-from .instructions import Dcd, Mov, Add, Sub, Orr1, Mul, Mov2, Add1
+from .instructions import Dcd, Mov, Add, Sub, Orr1, Mul, Mov2, Add1, Mul1
 from .instructions import B, Bl, Ble, Bgt, Beq, Blt, Cmp, Cmp2
-from .instructions import Push, Pop, Str, Ldr, Ldr3, Str1, Ldr1
+from .instructions import Push, Pop, Str, Ldr, Ldr3, Str1, Ldr1, Adr
 from .selector import ArmInstructionSelector
 from .frame import ArmFrame
 
@@ -20,9 +20,11 @@
         self.add_lowering(Ldr3, lambda im: Ldr3(im.dst[0], im.others[0]))
         self.add_lowering(Str1, lambda im: Str1(im.src[1], im.src[0], im.others[0]))
         self.add_lowering(Ldr1, lambda im: Ldr1(im.dst[0], im.src[0], im.others[0]))
+        self.add_lowering(Adr, lambda im: Adr(im.dst[0], im.others[0]))
         self.add_lowering(Mov2, lambda im: Mov2(im.dst[0], im.src[0]))
         self.add_lowering(Cmp2, lambda im: Cmp2(im.src[0], im.src[1]))
         self.add_lowering(Add1, lambda im: Add1(im.dst[0], im.src[0], im.src[1]))
+        self.add_lowering(Mul1, lambda im: Mul1(im.dst[0], im.src[0], im.src[1]))
 
     def make_parser(self):
         # Assembly grammar:
@@ -134,6 +136,10 @@
         self.add_instruction(['str', 'reg', ',', '[', 'reg', ',', 'reg', ']'],
             lambda rhs: Str(rhs[1], rhs[4], rhs[6]))
 
+        self.add_keyword('adr')
+        self.add_instruction(['adr', 'reg', ',', 'ID'],
+            lambda rhs: Adr(rhs[1], rhs[3].val))
+
         # Register list grammar:
         self.add_rule('reg_list', ['{', 'reg_list_inner', '}'],
             lambda rhs: rhs[1])