diff python/ppci/target/arm/__init__.py @ 346:3bb7dcfe5529

expanded arm target
author Windel Bouwman
date Fri, 07 Mar 2014 17:05:32 +0100
parents b4882ff0ed06
children 2b02bd286fe9
line wrap: on
line diff
--- a/python/ppci/target/arm/__init__.py	Sun Mar 02 17:12:08 2014 +0100
+++ b/python/ppci/target/arm/__init__.py	Fri Mar 07 17:05:32 2014 +0100
@@ -4,12 +4,25 @@
 from ..arm.registers import R8, R9, R10, R11, R12, SP, LR, PC
 from ..arm.registers import register_range
 
-from .instructions import Mov, Add, Sub, Orr1, B, Bl, Ble, Bgt, Beq
+from .instructions import Dcd, Mov, Add, Sub, Orr1, Mul, Mov2
+from .instructions import B, Bl, Ble, Bgt, Beq, Blt
+from .instructions import Push, Pop, Str, Ldr, Ldr3, Str1, Ldr1
+from .selector import ArmInstructionSelector
+from .frame import ArmFrame
 
 class ArmTarget(Target):
     def __init__(self):
-        super().__init__('arm_arm')
+        super().__init__('arm')
+        self.make_parser()
+        self.ins_sel = ArmInstructionSelector()
+        self.FrameClass = ArmFrame
 
+        self.add_lowering(Ldr3, lambda im: Ldr3(im.dst[0], im.others[0]))
+        self.add_lowering(Str1, lambda im: Str1(im.src[1], im.src[0], im.others[0]))
+        self.add_lowering(Ldr1, lambda im: Ldr1(im.dst[0], im.src[0], im.others[0]))
+        self.add_lowering(Mov2, lambda im: Mov2(im.dst[0], im.src[0]))
+
+    def make_parser(self):
         # Assembly grammar:
         self.add_keyword('r0')
         self.add_keyword('r1')
@@ -24,6 +37,9 @@
         self.add_keyword('r10')
         self.add_keyword('r11')
         self.add_keyword('r12')
+        self.add_keyword('sp')
+        self.add_keyword('lr')
+        self.add_keyword('pc')
 
         self.add_rule('reg', ['r0'], lambda rhs: R0)
         self.add_rule('reg', ['r1'], lambda rhs: R1)
@@ -38,10 +54,16 @@
         self.add_rule('reg', ['r10'], lambda rhs: R10)
         self.add_rule('reg', ['r11'], lambda rhs: R11)
         self.add_rule('reg', ['r12'], lambda rhs: R12)
+        self.add_rule('reg', ['sp'], lambda rhs: SP)
+        self.add_rule('reg', ['lr'], lambda rhs: LR)
+        self.add_rule('reg', ['pc'], lambda rhs: PC)
 
+        self.add_keyword('dcd')
+        self.add_instruction(['dcd', 'imm32'],
+                lambda rhs: Dcd(rhs[1]))
 
         self.add_keyword('mov')
-        self.add_instruction(['mov', 'reg', ',', 'imm8'],
+        self.add_instruction(['mov', 'reg', ',', 'imm32'],
                 lambda rhs: Mov(rhs[1], rhs[3]))
 
         self.add_keyword('add')
@@ -58,6 +80,10 @@
         self.add_instruction(['sub', 'reg', ',', 'reg', ',', 'reg'],
                 lambda rhs: Sub(rhs[1], rhs[3], rhs[5]))
 
+        self.add_keyword('mul')
+        self.add_instruction(['mul', 'reg', ',', 'reg', ',', 'reg'],
+                lambda rhs: Mul(rhs[1], rhs[3], rhs[5]))
+
         self.add_keyword('orr')
         self.add_instruction(['orr', 'reg', ',', 'reg', ',', 'reg'],
                 lambda rhs: Orr1(rhs[1], rhs[3], rhs[5]))
@@ -72,6 +98,38 @@
         self.add_instruction(['bgt', 'ID'], lambda rhs: Bgt(rhs[1].val))
         self.add_keyword('beq')
         self.add_instruction(['beq', 'ID'], lambda rhs: Beq(rhs[1].val))
+        self.add_keyword('blt')
+        self.add_instruction(['blt', 'ID'], lambda rhs: Blt(rhs[1].val))
 
         self.add_keyword('bl')
         self.add_instruction(['bl', 'ID'], lambda rhs: Bl(rhs[1].val))
+
+        # memory:
+        self.add_keyword('pop')
+        self.add_instruction(['pop', 'reg_list'], lambda rhs: Pop(rhs[1]))
+
+        self.add_keyword('push')
+        self.add_instruction(['push', 'reg_list'], lambda rhs: Push(rhs[1]))
+
+        self.add_keyword('ldr')
+        self.add_instruction(['ldr', 'reg', ',', '[', 'reg', ',', 'imm8', ']'],
+            lambda rhs: Ldr(rhs[1], rhs[4], rhs[6]))
+
+        self.add_keyword('str')
+        self.add_instruction(['str', 'reg', ',', '[', 'reg', ',', 'imm8', ']'],
+            lambda rhs: Str(rhs[1], rhs[4], rhs[6]))
+
+        self.add_instruction(['str', 'reg', ',', '[', 'reg', ',', 'reg', ']'],
+            lambda rhs: Str(rhs[1], rhs[4], rhs[6]))
+
+        # Register list grammar:
+        self.add_rule('reg_list', ['{', 'reg_list_inner', '}'],
+            lambda rhs: rhs[1])
+        self.add_rule('reg_list_inner', ['reg_or_range'],
+            lambda rhs: rhs[0])
+        self.add_rule('reg_list_inner', ['reg_or_range', ',', 'reg_list_inner'],
+            lambda rhs: rhs[0] | rhs[2])
+        self.add_rule('reg_or_range', ['reg'], lambda rhs: {rhs[0]})
+
+        self.add_rule('reg_or_range', ['reg', '-', 'reg'],
+            lambda rhs: register_range(rhs[0], rhs[2]))