comparison src/atomic/SDL_spinlock.c @ 5097:dceec93471e7

Improvements based on feedback from Anthony Williams
author Sam Lantinga <slouken@libsdl.org>
date Tue, 25 Jan 2011 17:40:06 -0800
parents 2164a79b5ca9
children b938ad843e52
comparison
equal deleted inserted replaced
5096:124cda437b07 5097:dceec93471e7
35 { 35 {
36 #if defined(_MSC_VER) 36 #if defined(_MSC_VER)
37 SDL_COMPILE_TIME_ASSERT(locksize, sizeof(*lock) == sizeof(long)); 37 SDL_COMPILE_TIME_ASSERT(locksize, sizeof(*lock) == sizeof(long));
38 return (InterlockedExchange((long*)lock, 1) == 0); 38 return (InterlockedExchange((long*)lock, 1) == 0);
39 39
40 #elif defined(__MACOSX__) 40 #elif __MACOSX__
41 return OSAtomicCompareAndSwap32Barrier(0, 1, lock); 41 return OSAtomicCompareAndSwap32Barrier(0, 1, lock);
42 42
43 #elif defined(HAVE_GCC_ATOMICS) || defined(HAVE_GCC_SYNC_LOCK_TEST_AND_SET) 43 #elif HAVE_GCC_ATOMICS || HAVE_GCC_SYNC_LOCK_TEST_AND_SET
44 return (__sync_lock_test_and_set(lock, 1) == 0); 44 return (__sync_lock_test_and_set(lock, 1) == 0);
45 45
46 #elif defined(__GNUC__) && defined(__arm__) && defined(__ARM_ARCH_5__) 46 #elif __GNUC__ && __arm__ && __ARM_ARCH_5__
47 int result; 47 int result;
48 __asm__ __volatile__ ( 48 __asm__ __volatile__ (
49 "swp %0, %1, [%2]\n" 49 "swp %0, %1, [%2]\n"
50 : "=&r,&r" (result) : "r,0" (1), "r,r" (lock) : "memory"); 50 : "=&r,&r" (result) : "r,0" (1), "r,r" (lock) : "memory");
51 return (result == 0); 51 return (result == 0);
52 52
53 #elif defined(__GNUC__) && defined(__arm__) 53 #elif __GNUC__ && __arm__
54 int result; 54 int result;
55 __asm__ __volatile__ ( 55 __asm__ __volatile__ (
56 "ldrex %0, [%2]\nteq %0, #0\nstrexeq %0, %1, [%2]" 56 "ldrex %0, [%2]\nteq %0, #0\nstrexeq %0, %1, [%2]"
57 : "=&r" (result) : "r" (1), "r" (lock) : "cc", "memory"); 57 : "=&r" (result) : "r" (1), "r" (lock) : "cc", "memory");
58 return (result == 0); 58 return (result == 0);
73 } 73 }
74 74
75 void 75 void
76 SDL_AtomicUnlock(SDL_SpinLock *lock) 76 SDL_AtomicUnlock(SDL_SpinLock *lock)
77 { 77 {
78 /* Assuming atomic assignment operation and full memory barrier in lock */ 78 #if defined(_MSC_VER)
79 _ReadWriteBarrier();
79 *lock = 0; 80 *lock = 0;
81
82 #elif HAVE_GCC_ATOMICS || HAVE_GCC_SYNC_LOCK_TEST_AND_SET
83 __sync_lock_release(lock);
84
85 #else
86 *lock = 0;
87 #endif
80 } 88 }
81 89
82 /* vi: set ts=4 sw=4 expandtab: */ 90 /* vi: set ts=4 sw=4 expandtab: */