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annotate src/audio/dc/aica.c @ 1555:780fd5b61df1

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Fixed bug #89 Date: Sun, 23 Oct 2005 16:39:03 +0200 From: "A. Schmid" <sahib@phreaker.net> Subject: [SDL] no software surfaces with svgalib driver? Hi, I noticed that the SDL (1.2.9) svgalib driver only makes use of linear addressable (framebuffer) video modes. On older systems (like one of mine), linear addressable modes are often not available. Especially for cards with VESA VBE < 2.0 the svgalib vesa driver is unusable, since VESA only supports framebuffering for VBE 2.0 and later. The changes necessary to add support for software surfaces seem to be relatively small. I only had to hack src/video/svga/SDL_svgavideo.c (see attached patch). The code worked fine for me, but it is no more than a proof of concept and should be reviewed (probably has a memory leak when switching modes). It also uses the vgagl library (included in the svgalib package) and needs to be linked against it. -Alex
author Sam Lantinga <slouken@libsdl.org>
date Sun, 19 Mar 2006 12:05:16 +0000
parents 11134dc42da8
children 782fd950bd46 c121d94672cb
rev   line source
509
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1 /* This file is part of the Dreamcast function library.
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2 * Please see libdream.c for further details.
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3 *
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4 * (c)2000 Dan Potter
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5 * modify BERO
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6 */
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7 #include "aica.h"
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8
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9 #include <arch/irq.h>
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10 #include <dc/spu.h>
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11
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12 /* #define dc_snd_base ((volatile unsigned char *)0x00800000) */ /* arm side */
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13 #define dc_snd_base ((volatile unsigned char *)0xa0700000) /* dc side */
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14
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15 /* Some convienence macros */
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16 #define SNDREGADDR(x) (0xa0700000 + (x))
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17 #define CHNREGADDR(ch,x) SNDREGADDR(0x80*(ch)+(x))
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18
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19
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20 #define SNDREG32(x) (*(volatile unsigned long *)SNDREGADDR(x))
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21 #define SNDREG8(x) (*(volatile unsigned char *)SNDREGADDR(x))
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22 #define CHNREG32(ch, x) (*(volatile unsigned long *)CHNREGADDR(ch,x))
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23 #define CHNREG8(ch, x) (*(volatile unsigned long *)CHNREGADDR(ch,x))
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24
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25 #define G2_LOCK(OLD) \
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26 do { \
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27 if (!irq_inside_int()) \
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28 OLD = irq_disable(); \
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29 /* suspend any G2 DMA here... */ \
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30 while((*(volatile unsigned int *)0xa05f688c) & 0x20) \
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31 ; \
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32 } while(0)
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33
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34 #define G2_UNLOCK(OLD) \
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35 do { \
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36 /* resume any G2 DMA here... */ \
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37 if (!irq_inside_int()) \
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38 irq_restore(OLD); \
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39 } while(0)
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40
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41
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42 void aica_init() {
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43 int i, j, old = 0;
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44
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45 /* Initialize AICA channels */
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46 G2_LOCK(old);
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47 SNDREG32(0x2800) = 0x0000;
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48
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49 for (i=0; i<64; i++) {
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50 for (j=0; j<0x80; j+=4) {
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51 if ((j&31)==0) g2_fifo_wait();
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52 CHNREG32(i, j) = 0;
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53 }
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54 g2_fifo_wait();
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55 CHNREG32(i,0) = 0x8000;
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56 CHNREG32(i,20) = 0x1f;
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57 }
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58
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59 SNDREG32(0x2800) = 0x000f;
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60 g2_fifo_wait();
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61 G2_UNLOCK(old);
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62 }
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63
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64 /* Translates a volume from linear form to logarithmic form (required by
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65 the AICA chip */
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66 /* int logs[] = {
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67
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68 0, 40, 50, 58, 63, 68, 73, 77, 80, 83, 86, 89, 92, 94, 97, 99, 101, 103,
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69 105, 107, 109, 111, 112, 114, 116, 117, 119, 120, 122, 123, 125, 126, 127,
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70 129, 130, 131, 133, 134, 135, 136, 137, 139, 140, 141, 142, 143, 144, 145,
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71 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 156, 157, 158, 159,
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72 160, 161, 162, 162, 163, 164, 165, 166, 166, 167, 168, 169, 170, 170, 171,
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73 172, 172, 173, 174, 175, 175, 176, 177, 177, 178, 179, 180, 180, 181, 182,
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74 182, 183, 183, 184, 185, 185, 186, 187, 187, 188, 188, 189, 190, 190, 191,
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75 191, 192, 193, 193, 194, 194, 195, 196, 196, 197, 197, 198, 198, 199, 199,
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76 200, 201, 201, 202, 202, 203, 203, 204, 204, 205, 205, 206, 206, 207, 207,
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77 208, 208, 209, 209, 210, 210, 211, 211, 212, 212, 213, 213, 214, 214, 215,
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78 215, 216, 216, 217, 217, 217, 218, 218, 219, 219, 220, 220, 221, 221, 222,
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79 222, 222, 223, 223, 224, 224, 225, 225, 225, 226, 226, 227, 227, 228, 228,
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80 228, 229, 229, 230, 230, 230, 231, 231, 232, 232, 232, 233, 233, 234, 234,
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81 234, 235, 235, 236, 236, 236, 237, 237, 238, 238, 238, 239, 239, 240, 240,
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82 240, 241, 241, 241, 242, 242, 243, 243, 243, 244, 244, 244, 245, 245, 245,
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83 246, 246, 247, 247, 247, 248, 248, 248, 249, 249, 249, 250, 250, 250, 251,
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84 251, 251, 252, 252, 252, 253, 253, 253, 254, 254, 254, 255
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85
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86 }; */
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87
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88 const static unsigned char logs[] = {
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89 0, 15, 22, 27, 31, 35, 39, 42, 45, 47, 50, 52, 55, 57, 59, 61,
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90 63, 65, 67, 69, 71, 73, 74, 76, 78, 79, 81, 82, 84, 85, 87, 88,
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91 90, 91, 92, 94, 95, 96, 98, 99, 100, 102, 103, 104, 105, 106,
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92 108, 109, 110, 111, 112, 113, 114, 116, 117, 118, 119, 120, 121,
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93 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134,
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94 135, 136, 137, 138, 138, 139, 140, 141, 142, 143, 144, 145, 146,
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95 146, 147, 148, 149, 150, 151, 152, 152, 153, 154, 155, 156, 156,
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96 157, 158, 159, 160, 160, 161, 162, 163, 164, 164, 165, 166, 167,
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97 167, 168, 169, 170, 170, 171, 172, 173, 173, 174, 175, 176, 176,
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98 177, 178, 178, 179, 180, 181, 181, 182, 183, 183, 184, 185, 185,
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99 186, 187, 187, 188, 189, 189, 190, 191, 191, 192, 193, 193, 194,
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100 195, 195, 196, 197, 197, 198, 199, 199, 200, 200, 201, 202, 202,
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101 203, 204, 204, 205, 205, 206, 207, 207, 208, 209, 209, 210, 210,
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102 211, 212, 212, 213, 213, 214, 215, 215, 216, 216, 217, 217, 218,
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103 219, 219, 220, 220, 221, 221, 222, 223, 223, 224, 224, 225, 225,
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104 226, 227, 227, 228, 228, 229, 229, 230, 230, 231, 232, 232, 233,
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105 233, 234, 234, 235, 235, 236, 236, 237, 237, 238, 239, 239, 240,
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106 240, 241, 241, 242, 242, 243, 243, 244, 244, 245, 245, 246, 246,
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107 247, 247, 248, 248, 249, 249, 250, 250, 251, 251, 252, 252, 253, 254, 255
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108 };
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109
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110 /* For the moment this is going to have to suffice, until we really
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111 figure out what these mean. */
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112 #define AICA_PAN(x) ((x)==0x80?(0):((x)<0x80?(0x1f):(0x0f)))
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113 #define AICA_VOL(x) (0xff - logs[128 + (((x) & 0xff) / 2)])
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114 //#define AICA_VOL(x) (0xff - logs[x&255])
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115
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116 static inline unsigned AICA_FREQ(unsigned freq) {
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117 unsigned long freq_lo, freq_base = 5644800;
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118 int freq_hi = 7;
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119
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120 /* Need to convert frequency to floating point format
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121 (freq_hi is exponent, freq_lo is mantissa)
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122 Formula is ferq = 44100*2^freq_hi*(1+freq_lo/1024) */
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123 while (freq < freq_base && freq_hi > -8) {
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124 freq_base >>= 1;
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125 --freq_hi;
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126 }
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127 while (freq < freq_base && freq_hi > -8) {
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128 freq_base >>= 1;
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129 freq_hi--;
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130 }
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131 freq_lo = (freq<<10) / freq_base;
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132 return (freq_hi << 11) | (freq_lo & 1023);
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133 }
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134
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135 /* Sets up a sound channel completely. This is generally good if you want
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136 a quick and dirty way to play notes. If you want a more comprehensive
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137 set of routines (more like PC wavetable cards) see below.
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138
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139 ch is the channel to play on (0 - 63)
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140 smpptr is the pointer to the sound data; if you're running off the
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141 SH4, then this ought to be (ptr - 0xa0800000); otherwise it's just
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142 ptr. Basically, it's an offset into sound ram.
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143 mode is one of the mode constants (16 bit, 8 bit, ADPCM)
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144 nsamp is the number of samples to play (not number of bytes!)
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145 freq is the sampling rate of the sound
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146 vol is the volume, 0 to 0xff (0xff is louder)
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147 pan is a panning constant -- 0 is left, 128 is center, 255 is right.
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148
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149 This routine (and the similar ones) owe a lot to Marcus' sound example --
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150 I hadn't gotten quite this far into dissecting the individual regs yet. */
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151 void aica_play(int ch,int mode,unsigned long smpptr,int loopst,int loopend,int freq,int vol,int pan,int loopflag) {
1461
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152 /* int i;
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153 */
509
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154 int val;
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155 int old = 0;
509
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156
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157 /* Stop the channel (if it's already playing) */
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158 aica_stop(ch);
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159 /* doesn't seem to be needed, but it's here just in case */
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160 /*
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161 for (i=0; i<256; i++) {
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162 asm("nop");
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163 asm("nop");
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164 asm("nop");
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165 asm("nop");
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166 }
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167 */
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168 G2_LOCK(old);
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169 /* Envelope setup. The first of these is the loop point,
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170 e.g., where the sample starts over when it loops. The second
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171 is the loop end. This is the full length of the sample when
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172 you are not looping, or the loop end point when you are (though
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173 storing more than that is a waste of memory if you're not doing
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174 volume enveloping). */
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175 CHNREG32(ch, 8) = loopst & 0xffff;
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176 CHNREG32(ch, 12) = loopend & 0xffff;
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177
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178 /* Write resulting values */
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179 CHNREG32(ch, 24) = AICA_FREQ(freq);
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180
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181 /* Set volume, pan, and some other things that we don't know what
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182 they do =) */
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183 CHNREG32(ch, 36) = AICA_PAN(pan) | (0xf<<8);
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184 /* Convert the incoming volume and pan into hardware values */
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185 /* Vol starts at zero so we can ramp */
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186 vol = AICA_VOL(vol);
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187 CHNREG32(ch, 40) = 0x24 | (vol<<8);
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188 /* Convert the incoming volume and pan into hardware values */
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189 /* Vol starts at zero so we can ramp */
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190
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191 /* If we supported volume envelopes (which we don't yet) then
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192 this value would set that up. The top 4 bits determine the
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193 envelope speed. f is the fastest, 1 is the slowest, and 0
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194 seems to be an invalid value and does weird things). The
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195 default (below) sets it into normal mode (play and terminate/loop).
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196 CHNREG32(ch, 16) = 0xf010;
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197 */
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198 CHNREG32(ch, 16) = 0x1f; /* No volume envelope */
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199
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200
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201 /* Set sample format, buffer address, and looping control. If
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202 0x0200 mask is set on reg 0, the sample loops infinitely. If
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203 it's not set, the sample plays once and terminates. We'll
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204 also set the bits to start playback here. */
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205 CHNREG32(ch, 4) = smpptr & 0xffff;
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206 val = 0xc000 | 0x0000 | (mode<<7) | (smpptr >> 16);
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207 if (loopflag) val|=0x200;
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208
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209 CHNREG32(ch, 0) = val;
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210
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211 G2_UNLOCK(old);
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212
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213 /* Enable playback */
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214 /* CHNREG32(ch, 0) |= 0xc000; */
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215 g2_fifo_wait();
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216
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217 #if 0
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218 for (i=0xff; i>=vol; i--) {
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219 if ((i&7)==0) g2_fifo_wait();
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220 CHNREG32(ch, 40) = 0x24 | (i<<8);;
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221 }
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222
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223 g2_fifo_wait();
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224 #endif
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225 }
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226
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227 /* Stop the sound on a given channel */
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228 void aica_stop(int ch) {
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229 g2_write_32(CHNREGADDR(ch, 0),(g2_read_32(CHNREGADDR(ch, 0)) & ~0x4000) | 0x8000);
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230 g2_fifo_wait();
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231 }
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232
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233
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234 /* The rest of these routines can change the channel in mid-stride so you
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235 can do things like vibrato and panning effects. */
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236
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237 /* Set channel volume */
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238 void aica_vol(int ch,int vol) {
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239 // g2_write_8(CHNREGADDR(ch, 41),AICA_VOL(vol));
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240 g2_write_32(CHNREGADDR(ch, 40),(g2_read_32(CHNREGADDR(ch, 40))&0xffff00ff)|(AICA_VOL(vol)<<8) );
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241 g2_fifo_wait();
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242 }
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243
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244 /* Set channel pan */
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245 void aica_pan(int ch,int pan) {
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246 // g2_write_8(CHNREGADDR(ch, 36),AICA_PAN(pan));
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247 g2_write_32(CHNREGADDR(ch, 36),(g2_read_32(CHNREGADDR(ch, 36))&0xffffff00)|(AICA_PAN(pan)) );
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248 g2_fifo_wait();
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249 }
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250
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251 /* Set channel frequency */
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252 void aica_freq(int ch,int freq) {
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253 g2_write_32(CHNREGADDR(ch, 24),AICA_FREQ(freq));
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254 g2_fifo_wait();
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255 }
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256
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257 /* Get channel position */
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258 int aica_get_pos(int ch) {
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259 #if 1
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260 /* Observe channel ch */
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261 g2_write_32(SNDREGADDR(0x280c),(g2_read_32(SNDREGADDR(0x280c))&0xffff00ff) | (ch<<8));
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262 g2_fifo_wait();
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263 /* Update position counters */
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264 return g2_read_32(SNDREGADDR(0x2814)) & 0xffff;
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265 #else
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266 /* Observe channel ch */
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267 g2_write_8(SNDREGADDR(0x280d),ch);
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268 /* Update position counters */
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269 return g2_read_32(SNDREGADDR(0x2814)) & 0xffff;
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270 #endif
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271 }