Mercurial > sdl-ios-xcode
annotate include/SDL_atomic.h @ 3180:77d6336711fc
First commit for SDL atomic operations.
On my linux box it compiles and installs correctly and testatomic runs without errors.
author | Bob Pendleton <bob@pendleton.com> |
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date | Tue, 09 Jun 2009 17:33:44 +0000 |
parents | |
children | 030899df1af5 |
rev | line source |
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3180
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1 /* |
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2 SDL - Simple DirectMedia Layer |
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3 Copyright (C) 1997-2006 Sam Lantinga |
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4 |
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5 This library is free software; you can redistribute it and/or |
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6 modify it under the terms of the GNU Lesser General Public |
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7 License as published by the Free Software Foundation; either |
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8 version 2.1 of the License, or (at your option) any later version. |
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9 |
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10 This library is distributed in the hope that it will be useful, |
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11 but WITHOUT ANY WARRANTY; without even the implied warranty of |
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12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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13 Lesser General Public License for more details. |
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14 |
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15 You should have received a copy of the GNU Lesser General Public |
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16 License along with this library; if not, write to the Free Software |
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17 Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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18 |
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19 Sam Lantinga |
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20 slouken@libsdl.org |
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21 */ |
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22 |
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23 /** |
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24 * \file SDL_atomic.h |
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25 * |
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26 * Atomic int and pointer magic |
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27 */ |
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28 |
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29 #ifndef _SDL_atomic_h_ |
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30 #define _SDL_atomic_h_ |
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31 |
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32 |
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33 #include "SDL_stdinc.h" |
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34 #include "SDL_platform.h" |
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35 |
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36 #include "begin_code.h" |
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37 |
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38 /* Set up for C function definitions, even when using C++ */ |
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39 #ifdef __cplusplus |
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40 /* *INDENT-OFF* */ |
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41 extern "C" { |
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42 /* *INDENT-ON* */ |
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43 #endif |
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44 |
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45 #if defined(__GNUC__) && (defined(i386) || defined(__i386__) || defined(__x86_64__)) |
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46 static __inline__ void |
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47 SDL_atomic_int_add(volatile int* atomic, int value) |
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48 { |
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49 __asm__ __volatile__("lock;" |
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50 "addl %1, %0" |
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51 : "=m" (*atomic) |
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52 : "ir" (value), |
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53 "m" (*atomic)); |
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54 } |
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55 |
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56 static __inline__ int |
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57 SDL_atomic_int_xchg_add(volatile int* atomic, int value) |
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58 { |
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59 int rv; |
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60 __asm__ __volatile__("lock;" |
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61 "xaddl %0, %1" |
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62 : "=r" (rv), |
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63 "=m" (*atomic) |
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64 : "0" (value), |
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65 "m" (*atomic)); |
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66 return rv; |
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67 } |
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68 |
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69 static __inline__ SDL_bool |
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70 SDL_atomic_int_cmp_xchg(volatile int* atomic, int oldvalue, int newvalue) |
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71 { |
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72 int rv; |
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73 __asm__ __volatile__("lock;" |
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74 "cmpxchgl %2, %1" |
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75 : "=a" (rv), |
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76 "=m" (*atomic) |
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77 : "r" (newvalue), |
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78 "m" (*atomic), |
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79 "0" (oldvalue)); |
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80 return (rv == oldvalue); |
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81 } |
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82 |
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83 static __inline__ SDL_bool |
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84 SDL_atomic_ptr_cmp_xchg(volatile void** atomic, void* oldvalue, void* newvalue) |
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85 { |
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86 void* rv; |
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87 __asm__ __volatile__("lock;" |
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88 # if defined(__x86_64__) |
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89 "cmpxchgq %q2, %1" |
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90 # else |
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91 "cmpxchgl %2, %1" |
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92 # endif |
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93 : "=a" (rv), |
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94 "=m" (*atomic) |
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95 : "r" (newvalue), |
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96 "m" (*atomic), |
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97 "0" (oldvalue)); |
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98 return (rv == oldvalue); |
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99 } |
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100 #elif defined(__GNUC__) && defined(__alpha__) |
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101 # define ATOMIC_MEMORY_BARRIER (__asm__ __volatile__ ("mb" : : : "memory")) |
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102 # define ATOMIC_INT_CMP_XCHG(atomic,value) \ |
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103 ({ \ |
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104 int rv,prev; \ |
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105 __asm__ __volatile__(" mb\n" \ |
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106 "1: ldl_l %0,%2\n" \ |
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107 " cmpeq %0,%3,%1\n" \ |
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108 " beq %1,2f\n" \ |
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109 " mov %4,%1\n" \ |
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110 " stl_c %1,%2\n" \ |
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111 " beq %1,1b\n" \ |
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112 " mb\n" \ |
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113 "2:" \ |
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114 : "=&r" (prev), \ |
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115 "=&r" (rv) \ |
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116 : "m" (*(atomic)), \ |
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117 "Ir" (oldvalue), \ |
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118 "Ir" (newvalue) \ |
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119 : "memory"); \ |
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120 (rv != 0); \ |
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121 }) |
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122 |
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123 # if (SIZEOF_VOIDP == 4) |
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124 static __inline__ SDL_bool |
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125 SDL_atomic_ptr_cmp_xchg(volatile void** atomic, void* oldvalue, void* newvalue) |
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126 { |
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127 int rv; |
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128 void* prev; |
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129 __asm__ __volatile__(" mb\n" |
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130 "1: ldl_l %0,%2\n" |
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131 " cmpeq %0,%3,%1\n" |
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132 " beq $1,2f\n" |
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133 " mov %4,%1\n" |
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134 " stl_c %1,%2\n" |
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135 " beq %1,1b\n" |
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136 " mb\n" |
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137 "2:" |
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138 : "=&r" (prev), |
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139 "=&r" (rv) |
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140 : "m" (*atomic), |
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141 "Ir" (oldvalue), |
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142 "Ir" (newvalue) |
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143 : "memory"); |
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144 return (rv != 0); |
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145 } |
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146 # elif (SIZEOF_VOIDP == 8) |
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147 static __inline__ SDL_bool |
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148 SDL_atomic_ptr_cmp_xchg(volatile void** atomic, void* oldvalue, void* newvalue) |
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149 { |
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150 int rv; |
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151 void* prev; |
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152 __asm__ __volatile__(" mb\n" |
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153 "1: ldq_l %0,%2\n" |
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154 " cmpeq %0,%3,%1\n" |
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155 " beq %1,2f\n" |
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156 " mov %4,%1\n" |
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157 " stq_c %1,%2\n" |
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158 " beq %1,1b\n" |
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159 " mb\n" |
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160 "2:" |
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161 : "=&r" (prev), |
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162 "=&r" (rv) |
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163 : "m" (*atomic), |
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164 "Ir" (oldvalue), |
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165 "Ir" (newvalue) |
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166 : "memory"); |
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167 return (rv != 0); |
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168 } |
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169 # else |
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170 # error "Your system has an unsupported pointer size" |
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171 # endif /* SIZEOF_VOIDP */ |
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172 #elif defined(__GNUC__) && defined(__sparc__) |
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173 # define ATOMIC_MEMORY_BARRIER \ |
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174 (__asm__ __volatile__("membar #LoadLoad | #LoadStore" \ |
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175 " | #StoreLoad | #StoreStore" : : : "memory")) |
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176 # define ATOMIC_INT_CMP_XCHG(atomic,oldvalue,newvalue) \ |
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177 ({ \ |
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178 int rv; \ |
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179 __asm__ __volatile__("cas [%4], %2, %0" \ |
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180 : "=r" (rv), "=m" (*(atomic)) \ |
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181 : "r" (oldvalue), "m" (*(atomic)), \ |
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182 "r" (atomic), "0" (newvalue)); \ |
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183 rv == oldvalue; \ |
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184 }) |
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185 |
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186 # if (SIZEOF_VOIDP == 4) |
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187 static __inline__ SDL_bool |
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188 SDL_atomic_ptr_cmp_xchg(volatile void** atomic, void* oldvalue, void* newvalue) |
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189 { |
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190 void* rv; |
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191 __asm__ __volatile__("cas [%4], %2, %0" |
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192 : "=r" (rv), |
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193 "=m" (*atomic) |
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194 : "r" (oldvalue), |
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195 "m" (*atomic), |
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196 "r" (atomic), |
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197 "0" (newvalue)); |
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198 return (rv == oldvalue); |
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199 } |
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200 # elif (SIZEOF_VOIDP == 8) |
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201 static __inline__ SDL_bool |
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202 SDL_atomic_ptr_cmp_xchg(volatile void** atomic, void* oldvalue, void* newvalue) |
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203 { |
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204 void* rv; |
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205 void** a = atomic; |
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206 __asm__ __volatile__("casx [%4], %2, %0" |
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207 : "=r" (rv), |
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208 "=m" (*a) |
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209 : "r" (oldvalue), |
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210 "m" (*a), |
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211 "r" (a), |
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212 "0" (newvalue)); |
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213 return (rv == oldvalue); |
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214 } |
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215 # else |
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216 # error "Your system has an unsupported pointer size" |
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217 # endif /* SIZEOF_VOIDP */ |
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218 #elif defined(__GNUC__) && (defined(__POWERPC__) || defined(__powerpc__) || defined(__ppc__) || defined(_M_PPC)) |
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219 # define ATOMIC_MEMORY_BARRIER \ |
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220 (__asm__ __volatile__ ("sync" : : : "memory")) |
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221 static __inline__ void |
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222 SDL_atomic_int_add(volatile int* atomic, int value) |
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223 { |
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224 int rv,tmp; |
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225 __asm__ __volatile__("1: lwarx %0, 0, %3\n" |
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226 " add %1, %0, %4\n" |
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227 " stwcx. %1, 0, %3\n" |
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228 " bne- 1b" |
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229 : "=&b" (rv), |
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230 "=&r" (tmp), |
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231 "=m" (*atomic) |
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232 : "b" (atomic), |
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233 "r" (value), |
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234 "m" (*atomic) |
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235 : "cr0", |
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236 "memory"); |
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237 } |
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238 |
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239 static __inline__ int |
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240 SDL_atomic_int_xchg_add(volatile int* atomic, int value) |
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241 { |
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242 int rv,tmp; |
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243 __asm__ __volatile__("1: lwarx %0, 0, %3\n" |
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244 " add %1, %0, %4\n" |
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245 " stwcx. %1, 0, %3\n" |
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246 " bne- 1b" |
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247 : "=&b" (rv), |
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248 "=&r" (tmp), |
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249 "=m" (*atomic) |
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250 : "b" (atomic), |
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251 "r" (value), |
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252 "m" (*atomic) |
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253 : "cr0", |
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254 "memory"); |
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255 return rv; |
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256 } |
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257 |
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258 # if (SIZEOF_VOIDP == 4) |
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259 static __inline__ SDL_bool |
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260 SDL_atomic_int_cmp_xchg(volatile int* atomic, int oldvalue, int newvalue) |
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261 { |
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262 int rv; |
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263 __asm__ __volatile__(" sync\n" |
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264 "1: lwarx %0, 0, %1\n" |
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265 " subf. %0, %2, %0\n" |
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266 " bne 2f\n" |
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267 " stwcx. %3, 0, %1\n" |
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268 " bne- 1b\n" |
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269 "2: isync" |
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270 : "=&r" (rv) |
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271 : "b" (atomic), |
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272 "r" (oldvalue), |
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273 "r" |
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274 : "cr0", |
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275 "memory"); |
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276 return (rv == 0); |
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277 } |
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278 |
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279 static __inline__ SDL_bool |
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280 SDL_atomic_ptr_cmp_xchg(volatile void** atomic, void* oldvalue, void* newvalue) |
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281 { |
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282 void* rv; |
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283 __asm__ __volatile__("sync\n" |
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284 "1: lwarx %0, 0, %1\n" |
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285 " subf. %0, %2, %0\n" |
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286 " bne 2f\n" |
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287 " stwcx. %3, 0, %1\n" |
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288 " bne- 1b\n" |
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289 "2: isync" |
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290 : "=&r" (rv) |
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291 : "b" (atomic), |
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292 "r" (oldvalue), |
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293 "r" (newvalue) |
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294 : "cr0", |
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295 "memory"); |
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296 return (rv == 0); |
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297 } |
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298 # elif (SIZEOF_VOIDP == 8) |
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299 static __inline__ SDL_bool |
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300 SDL_atomic_int_cmp_xchg(volatile int* atomic, int oldvalue, int newvalue) |
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301 { |
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302 int rv; |
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303 __asm__ __volatile__(" sync\n" |
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304 "1: lwarx %0, 0, %1\n" |
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305 " extsw %0, %0\n" |
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306 " subf. %0, %2, %0\n" |
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307 " bne 2f\n" |
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308 " stwcx. %3, 0, %1\n" |
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309 " bne- 1b\n" |
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310 "2: isync" |
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311 : "=&r" (rv) |
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312 : "b" (atomic), |
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313 "r" (oldvalue), |
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314 "r" |
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315 : "cr0", |
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316 "memory"); |
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317 return (rv == 0); |
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318 } |
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319 |
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320 static __inline__ SDL_bool |
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321 SDL_atomic_ptr_cmp_xchg(volatile void** atomic, void* oldvalue, void* newvalue) |
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322 { |
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323 void* rv; |
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324 __asm__ __volatile__("sync\n" |
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325 "1: ldarx %0, 0, %1\n" |
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326 " subf. %0, %2, %0\n" |
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327 " bne 2f\n" |
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328 " stdcx. %3, 0, %1\n" |
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329 " bne- 1b\n" |
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330 "2: isync" |
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331 : "=&r" (rv) |
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332 : "b" (atomic), |
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333 "r" (oldvalue), |
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334 "r" (newvalue) |
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335 : "cr0", |
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336 "memory"); |
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337 return (rv == 0); |
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338 } |
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339 # else |
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340 # error "Your system has an unsupported pointer size" |
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341 # endif /* SIZEOF_VOIDP */ |
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342 #elif defined(__GNUC__) && (defined(__IA64__) || defined(__ia64__)) |
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343 # define ATOMIC_MEMORY_BARRIER (__sync_synchronize()) |
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344 # define SDL_atomic_int_xchg_add(atomic, value) \ |
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345 (__sync_fetch_and_add((atomic),(value))) |
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346 # define SDL_atomic_int_add(atomic, value) \ |
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347 ((void)__sync_fetch_and_add((atomic),(value))) |
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348 # define SDL_atomic_int_cmp_xchg(atomic,oldvalue,newvalue) \ |
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349 (__sync_bool_compare_and_swap((atomic),(oldvalue),(newvalue))) |
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350 # define SDL_atomic_ptr_cmp_xchg(atomic,oldvalue,newvalue) \ |
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351 (__sync_bool_compare_and_swap((long*)(atomic),(long)(oldvalue),(long)(newvalue))) |
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352 #elif defined(__GNUC__) && defined(__LINUX__) && (defined(__mips__) || defined(__MIPS__)) |
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353 static __inline__ int |
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354 SDL_atomic_int_xchg_add(volatile int* atomic, int value) |
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355 { |
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356 int rv,tmp; |
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357 __asm__ __volatile__("1: \n" |
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358 ".set push \n" |
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359 ".set mips2 \n" |
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360 "ll %0,%3 \n" |
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361 "addu %1,%4,%0 \n" |
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362 "sc %1,%2 \n" |
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363 ".set pop \n" |
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364 "beqz %1,1b \n" |
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365 : "=&r" (rv), |
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366 "=&r" (tmp), |
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367 "=m" (*atomic) |
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368 : "m" (*atomic), |
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369 "r" (value) |
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370 : "memory"); |
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371 return rv; |
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372 } |
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373 |
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374 static __inline__ void |
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375 SDL_atomic_int_add(volatile int* atomic, int value) |
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376 { |
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377 int rv; |
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378 __asm__ __volatile__("1: \n" |
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379 ".set push \n" |
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380 ".set mips2 \n" |
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381 "ll %0,%2 \n" |
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382 "addu %0,%3,%0 \n" |
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383 "sc %0,%1 \n" |
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384 ".set pop \n" |
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385 "beqz %0,1b \n" |
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386 : "=&r" (rv), |
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387 "=m" (*atomic) |
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388 : "m" (*atomic), |
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389 "r" (value) |
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390 : "memory"); |
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391 } |
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392 |
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393 static __inline__ SDL_bool |
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394 SDL_atomic_int_cmp_xchg(volatile int* atomic, int oldvalue, int newvalue) |
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395 { |
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396 int rv; |
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397 __asm__ __volatile__(" .set push \n" |
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398 " .set noat \n" |
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399 " .set mips3 \n" |
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400 "1: ll %0, %2 \n" |
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401 " bne %0, %z3, 2f \n" |
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402 " .set mips0 \n" |
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403 " move $1, %z4 \n" |
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404 " .set mips3 \n" |
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405 " sc $1, %1 \n" |
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406 " beqz $1, 1b \n" |
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407 " sync \n" |
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408 "2: \n" |
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409 " .set pop \n" |
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410 : "=&r" (rv), |
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411 "=R" (*atomic) |
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412 : "R" (*atomic), |
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413 "Jr" (oldvalue), |
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414 "Jr" (newvalue) |
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415 : "memory"); |
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416 return (SDL_bool)rv; |
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417 } |
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418 |
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419 static __inline__ SDL_bool |
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420 SDL_atomic_ptr_cmp_xchg(volatile void** atomic, void* oldvalue, void* newvalue) |
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421 { |
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422 int rv; |
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423 __asm__ __volatile__(" .set push \n" |
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424 " .set noat \n" |
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425 " .set mips3 \n" |
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426 # if defined(__mips64) |
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427 "1: lld %0, %2 \n" |
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428 # else |
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429 "1: ll %0, %2 \n" |
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430 # endif |
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431 " bne %0, %z3, 2f \n" |
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parents:
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432 " move $1, %z4 \n" |
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433 # if defined(__mips64) |
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434 " sc $1, %1 \n" |
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435 # else |
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436 " scd $1, %1 \n" |
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437 # endif |
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parents:
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438 " beqz $1, 1b \n" |
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439 " sync \n" |
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440 "2: \n" |
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441 " .set pop \n" |
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442 : "=&r" (rv), |
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443 "=R" (*atomic) |
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444 : "R" (*atomic), |
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445 "Jr" (oldvalue), |
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446 "Jr" (newvalue) |
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447 : "memory"); |
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448 return (SDL_bool)rv; |
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449 } |
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450 #elif defined(__GNUC__) && defined(__m68k__) |
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451 static __inline__ int |
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452 SDL_atomic_int_xchg_add(volatile int* atomic, int value) |
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453 { |
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454 int rv = *atomic; |
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455 int tmp; |
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456 __asm__ __volatile__("1: move%.l %0,%1 \n" |
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457 " add%.l %2,%1 \n" |
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458 " cas%.l %0,%1,%3 \n" |
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459 " jbne 1b \n" |
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460 : "=d" (rv), |
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461 "=&d" (tmp) |
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462 : "d" (value), |
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463 "m" (*atomic), |
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464 "0" (rv) |
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465 : "memory"); |
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466 return rv; |
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467 } |
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468 |
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469 static __inline__ void |
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470 SDL_atomic_int_add(volatile int* atomic, int value) |
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471 { |
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472 __asm__ __volatile__("add%.l %0,%1" |
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473 : |
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474 : "id" (value), |
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475 "m" (*atomic) |
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parents:
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476 : "memory"); |
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parents:
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477 } |
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478 |
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479 static __inline__ SDL_bool |
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480 SDL_atomic_int_cmp_xchg(volatile int* atomic, int oldvalue, int newvalue) |
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481 { |
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482 char rv; |
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483 int readvalue; |
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484 __asm__ __volatile__("cas%.l %2,%3,%1\n" |
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485 "seq %0" |
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486 : "=dm" (rv), |
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487 "=m" (*atomic), |
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488 "=d" (readvalue) |
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489 : "d" (newvalue), |
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490 "m" (*atomic), |
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491 "2" (oldvalue)); |
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492 return rv; |
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parents:
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493 } |
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494 |
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495 static __inline__ SDL_bool |
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496 SDL_atomic_ptr_cmp_xchg(volatile void** atomic, void* oldvalue, void* newvalue) |
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497 { |
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498 char rv; |
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499 int readvalue; |
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500 __asm__ __volatile__("cas%.l %2,%3,%1\n" |
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501 "seq %0" |
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502 : "=dm" (rv), |
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503 "=m" (*atomic), |
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504 "=d" (readvalue) |
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505 : "d" (newvalue), |
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506 "m" (*atomic), |
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507 "2" (oldvalue)); |
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508 return rv; |
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parents:
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509 } |
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parents:
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510 #elif defined(__GNUC__) && defined(__s390__) |
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511 # define ATOMIC_INT_CMP_XCHG(atomic,oldvalue,newvalue) \ |
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parents:
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512 ({ \ |
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parents:
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513 int rv = oldvalue; \ |
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parents:
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514 __asm__ __volatile__("cs %0, %2, %1" \ |
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parents:
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515 : "+d" (rv), \ |
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parents:
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516 "=Q" (*(atomic)) \ |
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parents:
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517 : "d" (newvalue), \ |
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parents:
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518 "m" (*(atomic)) \ |
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parents:
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519 : "cc"); \ |
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parents:
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520 rv == oldvalue; \ |
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parents:
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521 }) |
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522 # if (SIZEOF_VOIDP == 4) |
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523 static __inline__ SDL_bool |
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524 SDL_atomic_ptr_cmp_xchg(volatile void** atomic, void* oldvalue, void* newvalue) |
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parents:
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525 { |
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526 void* rv = oldvalue; |
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527 __asm__ __volatile__("cs %0, %2, %1" |
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528 : "+d" (rv), |
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parents:
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529 "=Q" (*atomic) |
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parents:
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530 : "d" (newvalue), |
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531 "m" (*atomic) |
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parents:
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532 : "cc"); |
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533 return (rv == oldvalue); |
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534 } |
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535 # elif (SIZEOF_VOIDP == 8) |
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536 static __inline__ SDL_bool |
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537 SDL_atomic_ptr_cmp_xchg(volatile void** atomic, void* oldvalue, void* newvalue) |
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538 { |
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539 void* rv = oldvalue; |
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540 void** a = atomic; |
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541 __asm__ __volatile__("csg %0, %2, %1" |
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542 : "+d" (rv), |
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543 "=Q" (*a) |
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544 : "d" ((long)(newvalue)), |
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545 "m" (*a) |
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parents:
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546 : "cc"); |
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parents:
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547 return (rv == oldvalue); |
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parents:
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548 } |
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549 # else |
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550 # error "Your system has an unsupported pointer size" |
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parents:
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551 # endif /* SIZEOF_VOIDP */ |
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552 #elif defined(__WIN32__) |
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parents:
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553 # include <windows.h> |
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554 static __inline__ int |
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555 SDL_atomic_int_xchg_add(volatile int* atomic, int value) |
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parents:
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556 { |
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557 return InterlockedExchangeAdd(atomic, value); |
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558 } |
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559 |
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560 static __inline__ void |
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561 SDL_atomic_int_add(volatile int* atomic, int value) |
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562 { |
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563 InterlockedExchangeAdd(atomic, value); |
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564 } |
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565 |
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566 # if (WINVER > 0X0400) |
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567 static __inline__ SDL_bool |
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568 SDL_atmoic_int_cmp_xchg(volatile int* atomic, int oldvalue, int newvalue) |
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parents:
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569 { |
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570 return ((SDL_bool)InterlockedCompareExchangePointer((PVOID*)atomic, |
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571 (PVOID)newvalue, |
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572 (PVOID)oldvalue) == oldvalue); |
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573 } |
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574 |
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575 |
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576 static __inline__ SDL_bool |
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577 SDL_atomic_ptr_cmp_xchg(volatile void** atomic, void* oldvalue, void* newvalue) |
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578 { |
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579 return (InterlockedCompareExchangePointer(atomic, newvalue, oldvalue) == oldvalue); |
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580 } |
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581 # else /* WINVER <= 0x0400 */ |
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582 # if (SIZEOF_VOIDP != 4) |
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583 # error "InterlockedCompareExchangePointer needed" |
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584 # endif |
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585 |
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586 static __inline__ SDL_bool |
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587 SDL_atomic_int_cmp_xchg(volatile int* atomic, int oldvalue, int newvalue) |
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588 { |
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589 return (InterlockedCompareExchange(atomic, newvalue, oldvalue) == oldvalue); |
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590 } |
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591 |
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592 static __inline__ SDL_bool |
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593 SDL_atomic_ptr_cmp_xchg(volatile void** atomic, void* oldvalue, void* newvalue) |
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594 { |
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595 return (InterlockedCompareExchange(atomic, newvalue, oldvalue) == oldvalue); |
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596 } |
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597 # endif |
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598 #else /* when all else fails */ |
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599 # define SDL_ATOMIC_OPS_NOT_SUPPORTED |
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600 # warning "Atomic Ops for this platform not supported!" |
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601 static __inline__ int |
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602 SDL_atomic_int_xchg_add(volatile int* atomic, int value) |
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603 { |
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604 int rv = *atomic; |
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605 *(atomic) += value; |
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606 return rv; |
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607 } |
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608 |
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609 static __inline__ SDL_bool |
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610 SDL_atomic_int_cmp_xchg(volatile int* atomic, int oldvalue, int newvalue) |
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611 { |
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612 return (*atomic == oldvalue) ? |
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613 ((*atomic = newvalue), SDL_TRUE) : SDL_FALSE; |
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614 } |
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615 |
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616 static __inline__ void |
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617 SDL_atomic_int_add(volatile int* atomic, int value) |
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618 { |
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619 *atomic += value; |
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620 } |
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621 #endif /* arch & platforms */ |
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622 |
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623 #ifdef ATOMIC_INT_CMP_XCHG |
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624 static __inline__ SDL_bool |
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625 SDL_atomic_int_cmp_xchg(volatile int* atomic, int oldvalue, int newvalue) |
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626 { |
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627 return ATOMIC_INT_CMP_XCHG(atomic,oldvalue,newvalue); |
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628 } |
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629 |
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630 static __inline__ int |
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631 SDL_atomic_int_xchg_add(volatile int* atomic, int value) |
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632 { |
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633 int rv; |
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634 do |
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635 rv = *atomic; |
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636 while(!ATOMIC_INT_CMP_XCHG(atomic,rv,rv+value)); |
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637 return rv; |
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638 } |
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639 |
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640 static __inline__ void |
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641 SDL_atomic_int_add(volatile int* atomic, int value) |
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642 { |
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643 int rv; |
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644 do |
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645 rv = *atomic; |
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646 while(!ATOMIC_INT_CMP_XCHG(atomic,rv,rv+value)); |
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647 } |
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648 #endif /* ATOMIC_CMP_XCHG */ |
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649 |
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650 #ifdef ATOMIC_MEMORY_BARRIER |
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651 # define SDL_atomic_int_get(atomic) \ |
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652 (ATOMIC_MEMORY_BARRIER,*(atomic)) |
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653 # define SDL_atomic_int_set(atomic,value) \ |
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654 (*(atomic)=value,ATOMIC_MEMORY_BARRIER) |
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655 #else |
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656 # define SDL_atomic_int_get(atomic) (*(atomic)) |
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657 # define SDL_atomic_int_set(atomic, newvalue) ((void)(*(atomic) = (newvalue))) |
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658 #endif /* MEMORY_BARRIER_NEEDED */ |
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659 |
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660 #define SDL_atomic_int_inc(atomic) (SDL_atomic_int_add((atomic),1)) |
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661 #define SDL_atomic_int_dec_test(atomic) (SDL_atomic_int_xchg_add((atomic),-1) == 1) |
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662 |
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663 /* Ends C function definitions when using C++ */ |
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664 #ifdef __cplusplus |
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665 /* *INDENT-OFF* */ |
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666 } |
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667 /* *INDENT-ON* */ |
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668 #endif |
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669 |
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670 #include "close_code.h" |
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671 |
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672 #endif /* _SDL_atomic_h_ */ |
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673 |
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674 /* vi: set ts=4 sw=4 expandtab: */ |