Mercurial > sdl-ios-xcode
annotate src/cpuinfo/gcpuinfo.c @ 742:528a52626680
Fixed building cpuinfo under mingw32
author | Sam Lantinga <slouken@libsdl.org> |
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date | Wed, 19 Nov 2003 08:03:10 +0000 |
parents | 22dbf364c017 |
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rev | line source |
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739
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
Sam Lantinga <slouken@libsdl.org>
parents:
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1 /**************************************************************************** |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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2 * |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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3 * SciTech OS Portability Manager Library |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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4 * |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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5 * ======================================================================== |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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6 * |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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7 * Copyright (C) 1991-2002 SciTech Software, Inc. All rights reserved. |
22dbf364c017
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8 * |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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9 * This file may be distributed and/or modified under the terms of the |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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10 * GNU Lesser General Public License version 2.1 as published by the Free |
22dbf364c017
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11 * Software Foundation and appearing in the file LICENSE.LGPL included |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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12 * in the packaging of this file. |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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13 * |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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14 * Licensees holding a valid Commercial License for this product from |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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15 * SciTech Software, Inc. may use this file in accordance with the |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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16 * Commercial License Agreement provided with the Software. |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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17 * |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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18 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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19 * THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
22dbf364c017
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20 * PURPOSE. |
22dbf364c017
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21 * |
22dbf364c017
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22 * See http://www.scitechsoft.com/license/ for information about |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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23 * the licensing options available and how to purchase a Commercial |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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24 * License Agreement. |
22dbf364c017
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25 * |
22dbf364c017
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26 * Contact license@scitechsoft.com if any conditions of this licensing |
22dbf364c017
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27 * are not clear to you, or you have questions about licensing options. |
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28 * |
22dbf364c017
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29 * ======================================================================== |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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30 * |
22dbf364c017
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31 * Language: ANSI C |
22dbf364c017
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32 * Environment: Any |
22dbf364c017
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33 * |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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34 * Description: Main module to implement the Zen Timer support functions. |
22dbf364c017
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35 * |
22dbf364c017
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36 ****************************************************************************/ |
22dbf364c017
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37 |
22dbf364c017
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38 #include "cpuinfo.h" |
22dbf364c017
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39 //#include "pmapi.h" |
22dbf364c017
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40 //#include "oshdr.h" |
22dbf364c017
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41 |
22dbf364c017
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42 /*----------------------------- Implementation ----------------------------*/ |
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43 |
22dbf364c017
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44 /* External Intel assembler functions */ |
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45 #ifdef __INTEL__ |
22dbf364c017
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46 /* {secret} */ |
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47 ibool _ASMAPI _CPU_haveCPUID(void); |
22dbf364c017
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48 /* {secret} */ |
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49 ibool _ASMAPI _CPU_check80386(void); |
22dbf364c017
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50 /* {secret} */ |
22dbf364c017
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51 ibool _ASMAPI _CPU_check80486(void); |
22dbf364c017
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52 /* {secret} */ |
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53 uint _ASMAPI _CPU_checkCPUID(void); |
22dbf364c017
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54 /* {secret} */ |
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55 uint _ASMAPI _CPU_getCPUIDModel(void); |
22dbf364c017
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56 /* {secret} */ |
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57 uint _ASMAPI _CPU_getCPUIDStepping(void); |
22dbf364c017
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58 /* {secret} */ |
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59 uint _ASMAPI _CPU_getCPUIDFeatures(void); |
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60 /* {secret} */ |
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61 uint _ASMAPI _CPU_getCacheSize(void); |
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62 /* {secret} */ |
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63 uint _ASMAPI _CPU_have3DNow(void); |
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64 /* {secret} */ |
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65 ibool _ASMAPI _CPU_checkClone(void); |
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66 /* {secret} */ |
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67 void _ASMAPI _CPU_readTimeStamp(CPU_largeInteger *time); |
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68 /* {secret} */ |
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69 void _ASMAPI _CPU_runBSFLoop(ulong iterations); |
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70 /* {secret} */ |
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71 ulong _ASMAPI _CPU_mulDiv(ulong a,ulong b,ulong c); |
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72 /* {secret} */ |
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73 #define CPU_HaveMMX 0x00800000 |
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74 #define CPU_HaveRDTSC 0x00000010 |
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75 #define CPU_HaveSSE 0x02000000 |
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76 #endif |
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77 |
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78 /*------------------------ Public interface routines ----------------------*/ |
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79 |
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80 #ifdef __INTEL__ |
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81 extern Uint8 PM_inpb(int port); |
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82 extern void PM_outpb(int port,Uint8 val); |
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83 |
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84 /**************************************************************************** |
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85 REMARKS: |
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86 Read an I/O port location. |
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87 ****************************************************************************/ |
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88 static uchar rdinx( |
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89 int port, |
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90 int index) |
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91 { |
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92 PM_outpb(port,(uchar)index); |
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93 return PM_inpb(port+1); |
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94 } |
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95 |
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96 /**************************************************************************** |
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97 REMARKS: |
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98 Write an I/O port location. |
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99 ****************************************************************************/ |
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100 static void wrinx( |
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101 ushort port, |
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102 ushort index, |
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103 ushort value) |
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104 { |
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105 PM_outpb(port,(uchar)index); |
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106 PM_outpb(port+1,(uchar)value); |
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107 } |
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108 |
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109 /**************************************************************************** |
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110 REMARKS: |
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111 Enables the Cyrix CPUID instruction to properly detect MediaGX and 6x86 |
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112 processors. |
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113 ****************************************************************************/ |
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114 static void _CPU_enableCyrixCPUID(void) |
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115 { |
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116 uchar ccr3; |
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117 |
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118 //PM_init(); |
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119 ccr3 = rdinx(0x22,0xC3); |
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120 wrinx(0x22,0xC3,(uchar)(ccr3 | 0x10)); |
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121 wrinx(0x22,0xE8,(uchar)(rdinx(0x22,0xE8) | 0x80)); |
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122 wrinx(0x22,0xC3,ccr3); |
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123 } |
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124 #endif |
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125 |
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126 /**************************************************************************** |
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127 DESCRIPTION: |
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128 Returns the type of processor in the system. |
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129 |
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130 HEADER: |
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131 cpuinfo.h |
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132 |
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133 RETURNS: |
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134 Numerical identifier for the installed processor |
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135 |
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136 REMARKS: |
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137 Returns the type of processor in the system. Note that if the CPU is an |
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138 unknown Pentium family processor that we don't have an enumeration for, |
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139 the return value will be greater than or equal to the value of CPU_UnkPentium |
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140 (depending on the value returned by the CPUID instruction). |
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141 |
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142 SEE ALSO: |
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143 CPU_getProcessorSpeed, CPU_haveMMX, CPU_getProcessorName |
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144 ****************************************************************************/ |
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145 uint ZAPI CPU_getProcessorType(void) |
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146 { |
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147 #if defined(__INTEL__) |
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148 uint cpu,vendor,model,cacheSize; |
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149 static ibool firstTime = true; |
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150 |
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151 if (_CPU_haveCPUID()) { |
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152 cpu = _CPU_checkCPUID(); |
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153 vendor = cpu & ~CPU_mask; |
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154 if (vendor == CPU_Intel) { |
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155 /* Check for Intel processors */ |
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156 switch (cpu & CPU_mask) { |
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157 case 4: cpu = CPU_i486; break; |
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158 case 5: cpu = CPU_Pentium; break; |
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159 case 6: |
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160 if ((model = _CPU_getCPUIDModel()) == 1) |
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161 cpu = CPU_PentiumPro; |
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162 else if (model <= 6) { |
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163 cacheSize = _CPU_getCacheSize(); |
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164 if ((model == 5 && cacheSize == 0) || |
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165 (model == 5 && cacheSize == 256) || |
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166 (model == 6 && cacheSize == 128)) |
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167 cpu = CPU_Celeron; |
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168 else |
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169 cpu = CPU_PentiumII; |
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170 } |
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171 else if (model >= 7) { |
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172 /* Model 7 == Pentium III */ |
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173 /* Model 8 == Celeron/Pentium III Coppermine */ |
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174 cacheSize = _CPU_getCacheSize(); |
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175 if ((model == 8 && cacheSize == 128)) |
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176 cpu = CPU_Celeron; |
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177 else |
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178 cpu = CPU_PentiumIII; |
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179 } |
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180 break; |
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181 case 7: |
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182 cpu = CPU_Pentium4; |
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183 break; |
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184 default: |
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185 cpu = CPU_UnkIntel; |
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186 break; |
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187 } |
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188 } |
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189 else if (vendor == CPU_Cyrix) { |
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190 /* Check for Cyrix processors */ |
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191 switch (cpu & CPU_mask) { |
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192 case 4: |
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193 if ((model = _CPU_getCPUIDModel()) == 4) |
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194 cpu = CPU_CyrixMediaGX; |
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195 else |
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196 cpu = CPU_UnkCyrix; |
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197 break; |
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198 case 5: |
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199 if ((model = _CPU_getCPUIDModel()) == 2) |
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200 cpu = CPU_Cyrix6x86; |
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201 else if (model == 4) |
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202 cpu = CPU_CyrixMediaGXm; |
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203 else |
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204 cpu = CPU_UnkCyrix; |
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205 break; |
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206 case 6: |
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207 if ((model = _CPU_getCPUIDModel()) <= 1) |
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diff
changeset
|
208 cpu = CPU_Cyrix6x86MX; |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
209 else |
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diff
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|
210 cpu = CPU_UnkCyrix; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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211 break; |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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212 default: |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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213 cpu = CPU_UnkCyrix; |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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214 break; |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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215 } |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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216 } |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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217 else if (vendor == CPU_AMD) { |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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218 /* Check for AMD processors */ |
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219 switch (cpu & CPU_mask) { |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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220 case 4: |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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221 if ((model = _CPU_getCPUIDModel()) == 0) |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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222 cpu = CPU_AMDAm5x86; |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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223 else |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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224 cpu = CPU_AMDAm486; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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225 break; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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226 case 5: |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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227 if ((model = _CPU_getCPUIDModel()) <= 3) |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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228 cpu = CPU_AMDK5; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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229 else if (model <= 7) |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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230 cpu = CPU_AMDK6; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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231 else if (model == 8) |
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232 cpu = CPU_AMDK6_2; |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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233 else if (model == 9) |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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234 cpu = CPU_AMDK6_III; |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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235 else if (model == 13) { |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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236 if (_CPU_getCPUIDStepping() <= 3) |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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237 cpu = CPU_AMDK6_IIIplus; |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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238 else |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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239 cpu = CPU_AMDK6_2plus; |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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240 } |
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241 else |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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242 cpu = CPU_UnkAMD; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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243 break; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
244 case 6: |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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245 if ((model = _CPU_getCPUIDModel()) == 3) |
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246 cpu = CPU_AMDDuron; |
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247 else |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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248 cpu = CPU_AMDAthlon; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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249 break; |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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250 default: |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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251 cpu = CPU_UnkAMD; |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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252 break; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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253 } |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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254 } |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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255 else if (vendor == CPU_IDT) { |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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256 /* Check for IDT WinChip processors */ |
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257 switch (cpu & CPU_mask) { |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
258 case 5: |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
259 if ((model = _CPU_getCPUIDModel()) <= 4) |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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260 cpu = CPU_WinChipC6; |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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261 else if (model == 8) |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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262 cpu = CPU_WinChip2; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
263 else |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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diff
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|
264 cpu = CPU_UnkIDT; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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parents:
diff
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|
265 break; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
Sam Lantinga <slouken@libsdl.org>
parents:
diff
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|
266 case 6: |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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parents:
diff
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|
267 vendor = CPU_VIA; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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diff
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|
268 if ((model = _CPU_getCPUIDModel()) <= 6) |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
269 cpu = CPU_ViaCyrixIII; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
270 else |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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diff
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|
271 cpu = CPU_UnkVIA; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
272 break; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
273 default: |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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diff
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|
274 vendor = CPU_VIA; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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275 cpu = CPU_UnkVIA; |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
276 break; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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diff
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|
277 } |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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diff
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|
278 } |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
279 else { |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
280 /* Assume a Pentium compatible Intel clone */ |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
281 cpu = CPU_Pentium; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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parents:
diff
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|
282 } |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
283 return cpu | vendor | (_CPU_getCPUIDStepping() << CPU_steppingShift); |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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diff
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|
284 } |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
285 else { |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
286 if (_CPU_check80386()) |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
287 cpu = CPU_i386; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
288 else if (_CPU_check80486()) { |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
289 /* If we get here we may have a Cyrix processor so we can try |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
290 * enabling the CPUID instruction and trying again. |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
291 */ |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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parents:
diff
changeset
|
292 if (firstTime) { |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
293 firstTime = false; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
294 _CPU_enableCyrixCPUID(); |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
295 return CPU_getProcessorType(); |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
296 } |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
297 cpu = CPU_i486; |
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Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
298 } |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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changeset
|
299 else |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
300 cpu = CPU_Pentium; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
301 if (!_CPU_checkClone()) |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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changeset
|
302 return cpu | CPU_Intel; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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changeset
|
303 return cpu; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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diff
changeset
|
304 } |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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diff
changeset
|
305 #elif defined(__ALPHA__) |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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|
306 return CPU_Alpha; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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changeset
|
307 #elif defined(__MIPS__) |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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changeset
|
308 return CPU_Mips; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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changeset
|
309 #elif defined(__PPC__) |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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changeset
|
310 return CPU_PowerPC; |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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changeset
|
311 #endif |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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diff
changeset
|
312 } |
22dbf364c017
Added SDL_HasMMX(), SDL_Has3DNow(), SDL_HasSSE() in SDL_cpuinfo.h
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diff
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|
313 |
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314 /**************************************************************************** |
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315 DESCRIPTION: |
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316 Returns true if the processor supports Intel MMX extensions. |
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317 |
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318 HEADER: |
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319 cpuinfo.h |
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320 |
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321 RETURNS: |
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322 True if MMX is available, false if not. |
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323 |
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324 REMARKS: |
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325 This function determines if the processor supports the Intel MMX extended |
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326 instruction set. |
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327 |
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328 SEE ALSO: |
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329 CPU_getProcessorType, CPU_getProcessorSpeed, CPU_have3DNow, CPU_haveSSE, |
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330 CPU_getProcessorName |
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331 ****************************************************************************/ |
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332 ibool ZAPI CPU_haveMMX(void) |
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333 { |
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334 #ifdef __INTEL__ |
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335 if (_CPU_haveCPUID()) |
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336 return (_CPU_getCPUIDFeatures() & CPU_HaveMMX) != 0; |
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337 return false; |
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338 #else |
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339 return false; |
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340 #endif |
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341 } |
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342 |
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343 /**************************************************************************** |
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344 DESCRIPTION: |
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345 Returns true if the processor supports AMD 3DNow! extensions. |
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346 |
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347 HEADER: |
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348 cpuinfo.h |
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349 |
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350 RETURNS: |
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351 True if 3DNow! is available, false if not. |
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352 |
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353 REMARKS: |
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354 This function determines if the processor supports the AMD 3DNow! extended |
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355 instruction set. |
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356 |
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357 SEE ALSO: |
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358 CPU_getProcessorType, CPU_getProcessorSpeed, CPU_haveMMX, CPU_haveSSE, |
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359 CPU_getProcessorName |
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360 ****************************************************************************/ |
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361 ibool ZAPI CPU_have3DNow(void) |
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362 { |
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363 #ifdef __INTEL__ |
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364 if (_CPU_haveCPUID()) |
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365 return _CPU_have3DNow(); |
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366 return false; |
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367 #else |
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368 return false; |
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369 #endif |
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370 } |
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371 |
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372 /**************************************************************************** |
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373 DESCRIPTION: |
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374 Returns true if the processor supports Intel SSE extensions. |
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375 |
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376 HEADER: |
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377 cpuinfo.h |
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378 |
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379 RETURNS: |
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380 True if Intel SSE is available, false if not. |
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381 |
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382 REMARKS: |
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383 This function determines if the processor supports the Intel SSE extended |
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384 instruction set. |
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385 |
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386 SEE ALSO: |
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387 CPU_getProcessorType, CPU_getProcessorSpeed, CPU_haveMMX, CPU_have3DNow, |
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388 CPU_getProcessorName |
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389 ****************************************************************************/ |
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390 ibool ZAPI CPU_haveSSE(void) |
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391 { |
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392 #ifdef __INTEL__ |
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393 if (_CPU_haveCPUID()) |
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394 return (_CPU_getCPUIDFeatures() & CPU_HaveSSE) != 0; |
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395 return false; |
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396 #else |
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397 return false; |
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398 #endif |
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399 } |
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400 |
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401 /**************************************************************************** |
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402 RETURNS: |
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403 True if the RTSC instruction is available, false if not. |
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404 |
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405 REMARKS: |
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406 This function determines if the processor supports the Intel RDTSC |
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407 instruction, for high precision timing. If the processor is not an Intel or |
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408 Intel clone CPU, this function will always return false. |
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409 |
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410 DESCRIPTION: |
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411 Returns true if the processor supports RDTSC extensions. |
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412 |
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413 HEADER: |
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414 cpuinfo.h |
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415 |
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416 RETURNS: |
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417 True if RTSC is available, false if not. |
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418 |
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419 REMARKS: |
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420 This function determines if the processor supports the RDTSC instruction |
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421 for reading the processor time stamp counter. |
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422 |
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423 SEE ALSO: |
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424 CPU_getProcessorType, CPU_getProcessorSpeed, CPU_haveMMX, CPU_have3DNow, |
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425 CPU_getProcessorName |
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426 ****************************************************************************/ |
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427 ibool ZAPI CPU_haveRDTSC(void) |
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428 { |
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429 #ifdef __INTEL__ |
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430 if (_CPU_haveCPUID()) |
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431 return (_CPU_getCPUIDFeatures() & CPU_HaveRDTSC) != 0; |
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432 return false; |
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433 #else |
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434 return false; |
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435 #endif |
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436 } |