import struct
from .basetarget import Register, Instruction, Target, Label, LabelRef
from .basetarget import Imm32, Imm8, Imm7, Imm3
from .arminstructions import allins, Reg8Op, ArmRegister
from .arminstructions import Dcd, B
from .arminstructions import R0, R1, R2, R3, R4, R5, R6, R7, LR, PC, SP

from .armframe import ArmFrame
from .arminstructionselector import ArmInstructionSelector

""" ARM target description. """

# TODO: encode this in DSL (domain specific language)
# TBD: is this required?
# TODO: make a difference between armv7 and armv5?


class ArmTarget(Target):
    def __init__(self):
        super().__init__('arm')
        for i in allins:
            self.addInstruction(i)
            # TODO: fix this nicer?
            #setattr(self, i.__name__, i)
        self.check()
        self.ins_sel = ArmInstructionSelector()
        self.FrameClass = ArmFrame