view python/ppci/target/arm/arm.brg @ 350:2b02bd286fe9

Fixed A9 hello worle
author Windel Bouwman
date Sat, 08 Mar 2014 16:29:03 +0100
parents 3bb7dcfe5529
children 899ae3aea803
line wrap: on
line source


from ppci.target.arm.instructions import Add1, Sub1, Ldr1, Ldr3

%%

%terminal ADDI32 SUBI32 MULI32
%terminal ORI32 SHLI32
%terminal CONSTI32 MEMI32 REGI32 CALL
%terminal MOVI32

%%

reg: ADDI32(reg, reg) 2 (. d = self.newTmp(); self.emit(Add1, dst=[d], src=[$1, $2]); return d .)
reg: SUBI32(reg, reg) 2 (. d = self.newTmp(); self.emit(Sub1, dst=[d], src=[$1, $2]); return d .)
reg: SUBI32(reg, reg) 2 (. d = self.newTmp(); self.emit(Sub1, dst=[d], src=[$1, $2]); return d .)
reg: MEMI32(ADDI32(reg, cn)) 2 (. d = self.newTmp(); self.emit(Ldr1, dst=[d], src=[$1], others=[$2]); return d .)


cn: CONSTI32 0 (. return $$.value .)

reg: CONSTI32         3 (. d = self.newTmp(); ln = self.selector.frame.addConstant($$.value); self.emit(Ldr3, dst=[d], others=[ln]); return d .)
reg: REGI32           1 (. return $$.value .)