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346
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1
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2 from ppci.target.arm.instructions import Add1, Sub1, Ldr1, Ldr3
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3
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4 %%
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5
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6 %terminal ADDI32 SUBI32 MULI32
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7 %terminal ORI32 SHLI32
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8 %terminal CONSTI32 MEMI32 REGI32 CALL
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9 %terminal MOVI32
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10
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11 %%
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12
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13 reg: ADDI32(reg, reg) 2 (. d = self.newTmp(); self.emit(Add1, dst=[d], src=[$1, $2]); return d .)
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14 reg: SUBI32(reg, reg) 2 (. d = self.newTmp(); self.emit(Sub1, dst=[d], src=[$1, $2]); return d .)
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15 reg: SUBI32(reg, reg) 2 (. d = self.newTmp(); self.emit(Sub1, dst=[d], src=[$1, $2]); return d .)
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16 reg: MEMI32(ADDI32(reg, cn)) 2 (. d = self.newTmp(); self.emit(Ldr1, dst=[d], src=[$1], others=[$2]); return d .)
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17
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18
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19 cn: CONSTI32 0 (. return $$.value .)
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20
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21 reg: CONSTI32 3 (. d = self.newTmp(); ln = self.selector.frame.addConstant($$.value); self.emit(Ldr3, dst=[d], others=[ln]); return d .)
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22 reg: REGI32 1 (. return $$.value .)
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