diff python/ppci/target/arm/instructions.py @ 352:899ae3aea803

First kernel run for vexpressA9
author Windel Bouwman
date Sun, 09 Mar 2014 11:55:55 +0100
parents 2b02bd286fe9
children b8ad45b3a573
line wrap: on
line diff
--- a/python/ppci/target/arm/instructions.py	Sat Mar 08 16:46:51 2014 +0100
+++ b/python/ppci/target/arm/instructions.py	Sun Mar 09 11:55:55 2014 +0100
@@ -64,9 +64,6 @@
         self.token.cond = AL
         return self.token.encode()
 
-    def relocations(self):
-        return []
-
     def __repr__(self):
         return 'Mov {}, {}'.format(self.reg, self.imm)
 
@@ -91,6 +88,53 @@
         return 'MOV {}, {}'.format(self.rd, self.rm)
 
 
+def Cmp(*args):
+    if len(args) == 2:
+        if isinstance(args[1], int):
+            return Cmp1(*args)
+        elif isinstance(args[1], ArmRegister):
+            return Cmp2(*args)
+    raise Exception()
+
+
+class Cmp1(ArmInstruction):
+    """ CMP Rn, imm """
+    def __init__(self, reg, imm):
+        super().__init__()
+        assert type(imm) is int
+        self.reg = reg
+        self.imm = imm
+
+    def encode(self):
+        self.token[0:12] = encode_imm32(self.imm)
+        self.token.Rn = self.reg.num
+        self.token[20:28] = 0b00110101
+        self.token.cond = AL
+        return self.token.encode()
+
+    def __repr__(self):
+        return 'CMP {}, {}'.format(self.reg, self.imm)
+
+
+class Cmp2(ArmInstruction):
+    """ CMP Rn, Rm """
+    def __init__(self, rn, rm):
+        super().__init__()
+        self.rn = rn
+        self.rm = rm
+
+    def encode(self):
+        self.token.Rn = self.rn.num
+        self.token.Rm = self.rm.num
+        self.token[7:16] = 0
+        self.token[20:28] = 0b10101
+        self.token.cond = AL
+        return self.token.encode()
+
+    def __repr__(self):
+        return 'CMP {}, {}'.format(self.rn, self.rm)
+
+
 def Add(*args):
     if len(args) == 3 and isinstance(args[0], ArmRegister) and \
             isinstance(args[1], ArmRegister):
@@ -109,6 +153,7 @@
             return Sub2(args[0], args[1], args[2])
     raise Exception()
 
+
 def Mul(*args):
     return Mul1(args[0], args[1], args[2])
 
@@ -243,6 +288,8 @@
 class Blt(BranchBase):
     cond = LT
 
+class Bne(BranchBase):
+    cond = NE
 
 # Memory: