--- a/test/testasm.py	Fri Apr 18 13:08:45 2014 +0200
+++ b/test/testasm.py	Sat Apr 26 17:41:56 2014 +0200
@@ -2,11 +2,11 @@
 
 import unittest
 from ppci import CompilerError
-from ppci.assembler import tokenize, Assembler, Lexer
+from ppci.assembler import tokenize
 from ppci.objectfile import ObjectFile
-from ppci.linker import Linker
 from ppci.outstream import BinaryOutputStream
 from ppci.target.basetarget import Label
+from ppci.buildfunctions import link
 
 
 class AssemblerLexingCase(unittest.TestCase):
@@ -34,64 +34,6 @@
             list(tokenize(asmline, []))
 
 
-class AssemblerParsingTestCase(unittest.TestCase):
-    """
-        Tests the assembler parts
-    """
-    def setUp(self):
-        self.skipTest('refactoring asm parser')
-        self.parser = asmParser
-        self.stack = []
-
-    def emit(self, x):
-        self.stack.append(x)
-
-    def parse_line(self, line):
-        self.parser.parse(Lexer(line), self.emit)
-
-    def testParse(self):
-        asmline = 'lab1: mov rax, rbx'
-        self.parse_line(asmline)
-
-    def expectTree(self, asmline, stack):
-        self.parse_line(asmline)
-        self.assertSequenceEqual(stack, self.stack)
-
-    def testParse2(self):
-        asmline = 'a: mov rax, [rbx + 2]'
-        output = []
-        output.append(ALabel('a'))
-        output.append(AInstruction('mov', [ASymbol('rax'), AUnop('[]', ASymbol('rbx') + ANumber(2))]))
-        self.expectTree(asmline, output)
-
-    def testParse3(self):
-        # A label must be optional:
-        asmline = 'mov rax, 1'
-        output = [AInstruction('mov', [ASymbol('rax'), ANumber(1)])]
-        self.expectTree(asmline, output)
-
-    def testParse4(self):
-        # Test 3 operands:
-        asmline = 'add rax, [4*rbx + 22], rcx'
-        ops = []
-        ops.append(ASymbol('rax'))
-        ops.append(AUnop('[]', ANumber(4) * ASymbol('rbx') + ANumber(22)))
-        ops.append(ASymbol('rcx'))
-        output = [AInstruction('add', ops)]
-        self.expectTree(asmline, output)
-
-    def testParse5(self):
-        # An instruction must be optional:
-        asmline = 'lab1:'
-        output = []
-        output.append(ALabel('lab1'))
-        self.expectTree(asmline, output)
-
-    def testParse6(self):
-        # A line can be empty
-        self.parse_line('')
-
-
 class OustreamTestCase(unittest.TestCase):
     def test1(self):
         obj = ObjectFile()
@@ -104,11 +46,11 @@
 class AsmTestCaseBase(unittest.TestCase):
     """ Base testcase for assembly """
     def feed(self, line):
-        self.a.assemble(line, self.ostream)
+        self.assembler.assemble(line, self.ostream)
 
-    def check(self, hexstr):
-        l = Linker()
-        self.obj = l.link([self.obj])
+    def check(self, hexstr, layout={}):
+        self.assembler.flush()
+        self.obj = link([self.obj], layout)
         data = bytes(self.obj.get_section('.text').data)
         self.assertSequenceEqual(bytes.fromhex(hexstr), data)