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comparison python/arm_cm3.py @ 212:62386bcee1ba

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Added parser combinator lib
author Windel Bouwman
date Sun, 30 Jun 2013 19:00:41 +0200
parents 8b2f20aae086
children 57c032c5e753
comparison
equal deleted inserted replaced
211:99164160fb0b 212:62386bcee1ba
46 for n in range(n1.num, n2.num + 1): 46 for n in range(n1.num, n2.num + 1):
47 r = getRegNum(n) 47 r = getRegNum(n)
48 assert r 48 assert r
49 regs.append(r) 49 regs.append(r)
50 return regs 50 return regs
51
52 class MemoryOp:
53 def __init__(self, basereg, offset):
54 assert type(basereg) is ArmReg
55 self.basereg = basereg
56 self.offset = offset
57
58 @classmethod
59 def Create(cls, vop):
60 if type(vop) is AUnop and vop.operation == '[]':
61 vop = vop.arg # descent
62 if type(vop) is ABinop:
63 if vop.op == '+' and type(vop.arg1) is ASymbol and type(vop.arg2) is ANumber:
64 offset = vop.arg2.number
65 basereg = RegOp.Create(vop.arg1)
66 if not basereg:
67 return
68 else:
69 return
70 elif type(vop) is ASymbol:
71 offset = 0
72 basereg = RegOp.Create(vop)
73 if not basereg:
74 return
75 else:
76 return
77 return cls(getRegNum(basereg.num), offset)
78 pass
51 79
52 class RegisterSet: 80 class RegisterSet:
53 def __init__(self, regs): 81 def __init__(self, regs):
54 assert type(regs) is set 82 assert type(regs) is set
55 self.regs = regs 83 self.regs = regs
122 self.expr = expr 150 self.expr = expr
123 def encode(self): 151 def encode(self):
124 return u32(self.expr) 152 return u32(self.expr)
125 153
126 @armtarget.instruction 154 @armtarget.instruction
155 class storeimm5_ins(ArmInstruction):
156 """ str Rt, [Rn, imm5], store value into memory """
157 mnemonic = 'str'
158 operands = (RegOp, MemoryOp)
159 def __init__(self, rt, memop):
160 assert memop.offset % 4 == 0
161 self.imm5 = memop.offset >> 2
162 self.rn = memop.basereg.num
163 self.rt = rt.num
164
165 def encode(self):
166 Rn = self.rn
167 Rt = self.rt
168 imm5 = self.imm5
169 h = (0xC << 11) | (imm5 << 6) | (Rn << 3) | Rt
170 return u16(h)
171
172 @armtarget.instruction
173 class loadimm5_ins(ArmInstruction):
174 """ str Rt, [Rn, imm5], store value into memory """
175 mnemonic = 'ldr'
176 operands = (RegOp, MemoryOp)
177 def __init__(self, rt, memop):
178 assert memop.offset % 4 == 0
179 self.imm5 = memop.offset >> 2
180 self.rn = memop.basereg.num
181 self.rt = rt.num
182
183 def encode(self):
184 Rn = self.rn
185 Rt = self.rt
186 imm5 = self.imm5
187 h = (0xD << 11) | (imm5 << 6) | (Rn << 3) | Rt
188 return u16(h)
189
190 @armtarget.instruction
127 class mov_ins(ArmInstruction): 191 class mov_ins(ArmInstruction):
128 """ mov Rd, imm8, move immediate value into register """ 192 """ mov Rd, imm8, move immediate value into register """
129 mnemonic = 'mov' 193 mnemonic = 'mov'
130 opcode = 4 # 00100 Rd(3) imm8 194 opcode = 4 # 00100 Rd(3) imm8
131 operands = (RegOp, Imm8) 195 operands = (RegOp, Imm8)