Mercurial > lcfOS
comparison python/testasm.py @ 218:494828a7adf1
added some sort of cache to assembler
author | Windel Bouwman |
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date | Fri, 05 Jul 2013 15:30:22 +0200 |
parents | 62386bcee1ba |
children | 1fa3e0050b49 |
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217:8b2e5f3cd579 | 218:494828a7adf1 |
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3 import unittest, cProfile | 3 import unittest, cProfile |
4 from ppci import CompilerError | 4 from ppci import CompilerError |
5 from asmnodes import AInstruction, ABinop, AUnop, ASymbol, ALabel, ANumber | 5 from asmnodes import AInstruction, ABinop, AUnop, ASymbol, ALabel, ANumber |
6 from asm import tokenize, Assembler | 6 from asm import tokenize, Assembler |
7 import msp430 | 7 import msp430 |
8 import arm_cm3 | 8 import cortexm3 as arm |
9 | 9 |
10 class AssemblerLexingCase(unittest.TestCase): | 10 class AssemblerLexingCase(unittest.TestCase): |
11 """ Tests the assemblers lexer """ | 11 """ Tests the assemblers lexer """ |
12 | 12 |
13 def testLex0(self): | 13 def testLex0(self): |
148 self.assertEqual(27, len(self.t.instructions)) | 148 self.assertEqual(27, len(self.t.instructions)) |
149 | 149 |
150 | 150 |
151 class AssemblerARMTestCase(unittest.TestCase): | 151 class AssemblerARMTestCase(unittest.TestCase): |
152 def setUp(self): | 152 def setUp(self): |
153 self.t = arm_cm3.armtarget | 153 self.t = arm.armtarget |
154 self.a = Assembler(target=self.t) | 154 self.a = Assembler(target=self.t) |
155 | 155 |
156 def feed(self, line): | 156 def feed(self, line): |
157 self.a.assemble(line) | 157 self.a.assemble(line) |
158 | 158 |
159 def check(self, hexstr): | 159 def check(self, hexstr): |
160 self.assertEqual(bytes.fromhex(hexstr), self.a.binout) | 160 self.assertSequenceEqual(bytes.fromhex(hexstr), self.a.binout) |
161 | 161 |
162 def testMapOperand(self): | 162 def testMapOperand(self): |
163 pass | 163 pass |
164 | 164 |
165 def testMovImm8(self): | 165 def testMovImm8(self): |
183 self.check('0c60') | 183 self.check('0c60') |
184 | 184 |
185 def testLdr5(self): | 185 def testLdr5(self): |
186 self.feed('ldr r4, [r0 + 0]') | 186 self.feed('ldr r4, [r0 + 0]') |
187 self.check('0468') | 187 self.check('0468') |
188 | |
189 def testCmpRegReg(self): | |
190 self.feed('cmp r0, r1') | |
191 self.check('8842') | |
188 | 192 |
189 def testSequence1(self): | 193 def testSequence1(self): |
190 self.feed('mov r5, 3') | 194 self.feed('mov r5, 3') |
191 self.feed('add r4, r5, 0') | 195 self.feed('add r4, r5, 0') |
192 self.feed('loop: add r6, r4, 7') | 196 self.feed('loop: add r6, r4, 7') |