annotate python/x86.py @ 232:e621e3ba78d2

Added left shift instruction
author Windel Bouwman
date Sun, 14 Jul 2013 11:50:58 +0200
parents 6b2bec5653f1
children
rev   line source
157
8f3924b6076e Added some code generator things
Windel Bouwman
parents:
diff changeset
1 import ppci
158
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
2 import ir
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
3
180
25a0753da4cf Re-organized files
Windel Bouwman
parents: 178
diff changeset
4 class X86CodeGenSimple:
191
6b2bec5653f1 Added assembler testset
Windel Bouwman
parents: 180
diff changeset
5 """
6b2bec5653f1 Added assembler testset
Windel Bouwman
parents: 180
diff changeset
6 Inefficient code generation, assume stack machine
6b2bec5653f1 Added assembler testset
Windel Bouwman
parents: 180
diff changeset
7 backend
6b2bec5653f1 Added assembler testset
Windel Bouwman
parents: 180
diff changeset
8 """
157
8f3924b6076e Added some code generator things
Windel Bouwman
parents:
diff changeset
9 def __init__(self, diag):
8f3924b6076e Added some code generator things
Windel Bouwman
parents:
diff changeset
10 self.diag = diag
8f3924b6076e Added some code generator things
Windel Bouwman
parents:
diff changeset
11
158
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
12 def emit(self, i):
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
13 self.asm.append(i)
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
14
171
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
15 def genBin(self, ir):
158
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
16 self.asm = []
171
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
17 self.genModule(ir)
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
18 return self.asm
157
8f3924b6076e Added some code generator things
Windel Bouwman
parents:
diff changeset
19
171
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
20 def genModule(self, ir):
174
3eb06f5fb987 Added memory alloc for locals
Windel Bouwman
parents: 173
diff changeset
21 for f in ir.Functions:
3eb06f5fb987 Added memory alloc for locals
Windel Bouwman
parents: 173
diff changeset
22 self.genFunction(f)
158
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
23 def genFunction(self, f):
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
24 self.emit('global {0}'.format(f.name))
180
25a0753da4cf Re-organized files
Windel Bouwman
parents: 178
diff changeset
25 self.emit('{0}:'.format(f.name))
25a0753da4cf Re-organized files
Windel Bouwman
parents: 178
diff changeset
26 self.emit('jmp {0}'.format(f.entry.name))
158
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
27 for bb in f.BasicBlocks:
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
28 self.genBB(bb)
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
29 def genBB(self, bb):
180
25a0753da4cf Re-organized files
Windel Bouwman
parents: 178
diff changeset
30 self.emit('{0}:'.format(bb.name))
158
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
31 for i in bb.Instructions:
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
32 self.genIns(i)
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
33 def genIns(self, i):
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
34 if type(i) is ir.BinaryOperator:
171
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
35 ops = {'+':'add', '-':'sub', '*':'mul'}
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
36 if i.operation in ops:
180
25a0753da4cf Re-organized files
Windel Bouwman
parents: 178
diff changeset
37 i.result.reg = 'rax'
25a0753da4cf Re-organized files
Windel Bouwman
parents: 178
diff changeset
38 i.value1.reg = 'rbx'
25a0753da4cf Re-organized files
Windel Bouwman
parents: 178
diff changeset
39 i.value2.reg = 'rbx'
25a0753da4cf Re-organized files
Windel Bouwman
parents: 178
diff changeset
40 self.emit('mov {0}, {1}'.format(i.result.reg, i.value1.reg))
25a0753da4cf Re-organized files
Windel Bouwman
parents: 178
diff changeset
41 self.emit('{0} {1}, {2}'.format(ops[i.operation], i.result.reg, i.value2.reg))
171
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
42 else:
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
43 raise NotImplementedError('op {0}'.format(i.operation))
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
44 elif type(i) is ir.Load:
180
25a0753da4cf Re-organized files
Windel Bouwman
parents: 178
diff changeset
45 self.emit('mov {0}, [{1}]'.format(i.value, i.location))
171
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
46 elif type(i) is ir.Return:
158
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
47 self.emit('ret')
171
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
48 elif type(i) is ir.Call:
160
10330be89bc2 Started from scratch with code edit
Windel Bouwman
parents: 158
diff changeset
49 self.emit('call')
171
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
50 elif type(i) is ir.ImmLoad:
180
25a0753da4cf Re-organized files
Windel Bouwman
parents: 178
diff changeset
51 self.emit('mov {0}, {1}'.format(i.target, i.value))
171
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
52 elif type(i) is ir.Store:
180
25a0753da4cf Re-organized files
Windel Bouwman
parents: 178
diff changeset
53 self.emit('mov [{0}], {1}'.format(i.location, i.value))
171
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
54 elif type(i) is ir.ConditionalBranch:
180
25a0753da4cf Re-organized files
Windel Bouwman
parents: 178
diff changeset
55 self.emit('cmp {0}, {1}'.format(i.a, i.b))
171
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
56 jmps = {'>':'jg', '<':'jl', '==':'je'}
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
57 if i.cond in jmps:
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
58 j = jmps[i.cond]
180
25a0753da4cf Re-organized files
Windel Bouwman
parents: 178
diff changeset
59 self.emit('{0} {1}'.format(j, i.lab1.name))
171
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
60 else:
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
61 raise NotImplementedError('condition {0}'.format(i.cond))
180
25a0753da4cf Re-organized files
Windel Bouwman
parents: 178
diff changeset
62 self.emit('jmp {0}'.format(i.lab2.name))
171
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
63 elif type(i) is ir.Branch:
180
25a0753da4cf Re-organized files
Windel Bouwman
parents: 178
diff changeset
64 self.emit('jmp {0}'.format(i.target.name))
174
3eb06f5fb987 Added memory alloc for locals
Windel Bouwman
parents: 173
diff changeset
65 elif type(i) is ir.Alloc:
3eb06f5fb987 Added memory alloc for locals
Windel Bouwman
parents: 173
diff changeset
66 pass
158
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
67 else:
171
3eb9b9e2958d Improved IR code
Windel Bouwman
parents: 160
diff changeset
68 raise NotImplementedError('{0}'.format(i))
158
9683a4cd848f Added some functions for code generation
Windel Bouwman
parents: 157
diff changeset
69