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annotate cos/kernel/asmcode.asm @ 238:90637d1bbfad

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Added test sequence 2
author Windel Bouwman
date Sat, 20 Jul 2013 13:18:04 +0200
parents 91f91ff07ea8
children
rev   line source
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1 ; The default interrupt handlers.
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2 ; from 20 - 31 are reserved vectors.
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3 ; below are the custom ones!
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4
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5 ; Calling convention AMD64 ABI:
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6 ; parameters in: rdi, rsi, rdx, rcx ....
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7
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8 section .text
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9 align 4
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10
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d3c4bf3720a3 Beginning of multitasking
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11 ; Function to read the current instruction pointer value:
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12 global read_rip
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13 read_rip:
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14 pop rax
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15 jmp rax
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16
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17 global loadIDT
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18 loadIDT:
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19 extern idtP
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20 ; TODO: make this pointer thing more insightfull:
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21 lidt [idtP]
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22 ret
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23
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24 global setCR3
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25 setCR3:
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26 mov cr3, rdi ; Load cr3
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27 ret
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28
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29 ; ISR related assembler wrappers:
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30
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31 %macro ISR_NOERRCODE 1
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32 global INT%1
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33 INT%1:
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34 cli
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35 push strict qword 0 ; push dummy error code
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36 push strict qword %1 ; push interrupt number
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37 jmp isr_common_stub
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38 %endmacro
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39
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40 %macro ISR_ERRCODE 1
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41 global INT%1
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42 INT%1:
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43 cli ; disable interrupts
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44 push strict qword %1 ; push interrupt number
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45 jmp isr_common_stub
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46 %endmacro
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47
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48 isr_common_stub:
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49 ; Do some saving:
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50 push rax ; regs[6]
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51 push rcx
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52 push rdx
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53 push rbx
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54 push rbp
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55 push rsi
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56 push rdi ; regs[0]
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57
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58 ; AMD64 calling convention, first parameter is in rdi:
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59 mov rdi, rsp ; Load stack pointer into rdi to indicate where the registers on the stack are (so that we can change them!)
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60
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61 ; TODO: load kernel interrupt stack pointer
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62 extern isr_handler
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63 call isr_handler
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64
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65 pop rdi
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66 pop rsi
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67 pop rbp
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68 pop rbx
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69 pop rdx
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70 pop rcx
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71 pop rax
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72
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73 add rsp, 16 ; cleanup error code and isr number
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74 sti ; enable interrupts again
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75 iretq
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76
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77 ; Exception handlers:
31
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78 ISR_NOERRCODE 0
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79 ISR_NOERRCODE 1
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80 ISR_NOERRCODE 2
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81 ISR_NOERRCODE 3
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82 ISR_NOERRCODE 4
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83 ISR_NOERRCODE 5
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84 ISR_NOERRCODE 6
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85 ISR_NOERRCODE 7
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86 ISR_ERRCODE 8
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87 ISR_NOERRCODE 9
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88 ISR_ERRCODE 10
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89 ISR_ERRCODE 11
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90 ISR_ERRCODE 12
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91 ISR_ERRCODE 13
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92 ISR_ERRCODE 14
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93 ; 15 is reserved
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94 ISR_NOERRCODE 16
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95 ISR_ERRCODE 17
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96 ISR_NOERRCODE 18
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97 ISR_NOERRCODE 19
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98 ; 20 - 31 are reserved
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99
33
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100 ; irq handlers:
31
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101 ISR_NOERRCODE 32
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102 ISR_NOERRCODE 33
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103 ISR_NOERRCODE 34
33
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104 ISR_NOERRCODE 35
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105 ISR_NOERRCODE 36
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106 ISR_NOERRCODE 37
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107 ISR_NOERRCODE 38
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108 ISR_NOERRCODE 39
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109 ISR_NOERRCODE 40
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110 ISR_NOERRCODE 41
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111 ISR_NOERRCODE 42
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112 ISR_NOERRCODE 43
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113 ISR_NOERRCODE 44
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114 ISR_NOERRCODE 45
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115 ISR_NOERRCODE 46
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116 ISR_NOERRCODE 47
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117
31
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118 ; default handler:
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119 ISR_NOERRCODE 255
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120
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121