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1 import os
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2 from ppci import ir
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3 from ppci.irmach import AbstractInstruction as makeIns
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4 from ppci.ir2tree import makeTree
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5 import pyburg
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6 from .basetarget import Label, Comment, Alignment, LabelRef, DebugInfo, Nop
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7 from .instructionselector import InstructionSelector
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8 from .arminstructions import Orr, Lsl, Str2, Ldr2, Ldr3
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9 from .arminstructions import B, Bl, Bgt, Blt, Beq, Bne
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10 from .arminstructions import Mov2, Mov3
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11 from .arminstructions import Add, Sub, Cmp, Sub2, Add2, Mul
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12 from .basetarget import Imm8, Imm7, Imm3
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13
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14 # Import BURG spec for arm:
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15 spec_file = os.path.join(os.path.dirname(os.path.abspath(__file__)), 'arm.brg')
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16 arm_matcher = pyburg.load_as_module(spec_file)
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17
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18
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19 class ArmMatcher(arm_matcher.Matcher):
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20 """ Matcher that derives from a burg spec generated matcher """
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21 def __init__(self, selector):
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22 super().__init__()
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23 self.newTmp = selector.newTmp
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24 self.emit = selector.emit
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25 self.selector = selector
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26
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27
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28 class ArmInstructionSelector(InstructionSelector):
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29 """ Instruction selector for the arm architecture """
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30 def __init__(self):
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31 super().__init__()
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32 self.matcher = ArmMatcher(self)
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33
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34 def munchExpr(self, e):
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35 # Use BURG system here:
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36 t = makeTree(e)
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37 return self.matcher.gen(t)
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38
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39 def munchCall(self, e):
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40 """ Generate code for call sequence """
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41 # Move arguments into proper locations:
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42 reguses = []
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43 for i, a in enumerate(e.arguments):
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44 loc = self.frame.argLoc(i)
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45 m = ir.Move(loc, a)
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46 self.munchStm(m)
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47 if isinstance(loc, ir.Temp):
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48 reguses.append(loc)
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49 self.emit(Bl(LabelRef(e.f)), src=reguses, dst=[self.frame.rv])
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50 d = self.newTmp()
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51 self.move(d, self.frame.rv)
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52 return d
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53
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54 def munchStm(self, s):
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55 if isinstance(s, ir.Terminator):
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56 pass
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57 elif isinstance(s, ir.Move) and isinstance(s.dst, ir.Mem) and \
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58 isinstance(s.dst.e, ir.Binop) and s.dst.e.operation == '+' and \
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59 isinstance(s.dst.e.b, ir.Const):
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60 a = self.munchExpr(s.dst.e.a)
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61 val = self.munchExpr(s.src)
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62 c = s.dst.e.b.value
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63 self.emit(Str2, others=[c], src=[a, val])
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64 elif isinstance(s, ir.Move) and isinstance(s.dst, ir.Mem):
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65 memloc = self.munchExpr(s.dst.e)
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66 val = self.munchExpr(s.src)
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67 self.emit(Str2, others=[0], src=[memloc, val])
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68 elif isinstance(s, ir.Move) and isinstance(s.dst, ir.Temp):
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69 val = self.munchExpr(s.src)
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70 dreg = s.dst
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71 self.move(dreg, val)
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72 elif isinstance(s, ir.Exp):
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73 # Generate expression code and discard the result.
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74 x = self.munchExpr(s.e)
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75 self.emit(Nop(), src=[x])
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76 elif isinstance(s, ir.Jump):
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77 tgt = self.targets[s.target]
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78 self.emit(B(LabelRef(s.target.name)), jumps=[tgt])
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79 elif isinstance(s, ir.CJump):
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80 a = self.munchExpr(s.a)
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81 b = self.munchExpr(s.b)
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82 self.emit(Cmp, src=[a, b])
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83 ntgt = self.targets[s.lab_no]
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84 ytgt = self.targets[s.lab_yes]
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85 jmp_ins = makeIns(B(LabelRef(s.lab_no.name)), jumps=[ntgt])
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86 opnames = {'<': Blt, '>':Bgt, '==':Beq, '!=':Bne}
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87 op = opnames[s.cond](LabelRef(s.lab_yes.name))
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88 self.emit(op, jumps=[ytgt, jmp_ins]) # Explicitely add fallthrough
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89 self.emit2(jmp_ins)
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90 else:
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91 raise NotImplementedError('Stmt --> {}'.format(s))
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92
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93 def move(self, dst, src):
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94 self.emit(Mov2, src=[src], dst=[dst], ismove=True)
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