Mercurial > lcfOS
annotate python/target/arm.brg @ 341:4d204f6f7d4e devel
Rewrite of assembler parts
| author | Windel Bouwman |
|---|---|
| date | Fri, 28 Feb 2014 18:07:14 +0100 |
| parents | d1ecc493384e |
| children |
| rev | line source |
|---|---|
| 322 | 1 |
| 323 | 2 from target.basetarget import Label, Comment, Alignment, LabelRef, DebugInfo, Nop |
| 322 | 3 from target.arminstructions import Orr, Lsl, Str2, Ldr2, Ldr3 |
| 4 from target.arminstructions import B, Bl, Bgt, Blt, Beq, Bne | |
| 5 from target.arminstructions import Mov2, Mov3 | |
| 341 | 6 from target.arminstructions import Add3, Sub, Cmp, Sub2, Add2, Mul |
|
336
d1ecc493384e
Added spiffy armtoken class for bit fiddeling. Added cool test that checks for build repeatability
Windel Bouwman
parents:
323
diff
changeset
|
7 from ppci import ir |
| 322 | 8 |
| 9 %% | |
| 10 | |
| 323 | 11 %terminal ADDI32 SUBI32 MULI32 |
| 12 %terminal ORI32 SHLI32 | |
| 322 | 13 %terminal CONSTI32 MEMI32 REGI32 CALL |
| 323 | 14 %terminal MOVI32 |
| 322 | 15 |
| 16 %% | |
| 17 | |
| 323 | 18 |
| 341 | 19 reg: ADDI32(reg, reg) 2 (. d = self.newTmp(); self.emit(Add3, dst=[d], src=[$1, $2]); return d .) |
| 322 | 20 reg: SUBI32(reg, reg) 2 (. d = self.newTmp(); self.emit(Sub, dst=[d], src=[$1, $2]); return d .) |
| 323 | 21 reg: ORI32(reg, reg) 2 (. d = self.newTmp(); self.selector.move(d, $1); self.emit(Orr, dst=[], src=[d, $2]); return d .) |
| 22 reg: SHLI32(reg, reg) 2 (. d = self.newTmp(); self.selector.move(d, $1); self.emit(Lsl, dst=[], src=[d, $2]); return d .) | |
| 23 reg: MULI32(reg, reg) 2 (. d = self.newTmp(); self.selector.move(d, $1); self.emit(Mul, dst=[d], src=[$2, d]); return d .) | |
| 322 | 24 |
| 323 | 25 reg: CONSTI32 3 (. d = self.newTmp(); ln = LabelRef(self.selector.frame.addConstant($$.value)); self.emit(Ldr3, dst=[d], others=[ln]); return d .) |
| 26 reg: MEMI32(reg) 4 (. d = self.newTmp(); self.emit(Ldr2, dst=[d], src=[$1], others=[0]); return d .) | |
| 27 reg: REGI32 1 (. return $$.value .) | |
| 28 reg: CALL 1 (. return self.selector.munchCall($$.value) .) | |
| 322 | 29 |
| 30 | |
| 323 | 31 stmt: MOVI32(MEMI32(addr), reg) 3 (. self.emit(Str2, src=[$1, $2]) .) |
| 32 | |
| 33 addr: reg 2 (. .) |