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114
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1 import struct, time
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113
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2 from usb import UsbContext
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3
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4 class STLinkException(Exception):
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5 pass
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6
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115
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7 ST_VID, STLINK2_PID = 0x0483, 0x3748
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8
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113
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9 def checkDevice(device):
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10 return device.VendorId == ST_VID and device.ProductId == STLINK2_PID
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11
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115
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12 DFU_MODE, MASS_MODE, DEBUG_MODE = 0, 1, 2
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117
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13
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14 CORE_RUNNING = 0x80
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15 CORE_HALTED = 0x81
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16
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114
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17 # Commands:
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18 GET_VERSION = 0xf1
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19 DEBUG_COMMAND = 0xf2
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20 DFU_COMMAND = 0xf3
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21 GET_CURRENT_MODE = 0xf5
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22
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23 # dfu commands:
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24 DFU_EXIT = 0x7
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113
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25
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114
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26 # debug commands:
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27 DEBUG_ENTER = 0x20
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28 DEBUG_EXIT = 0x21
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29 DEBUG_ENTER_SWD = 0xa3
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30 DEBUG_GETSTATUS = 0x01
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116
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31 DEBUG_RESETSYS = 0x03
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115
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32 DEBUG_READREG = 0x5
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33 DEBUG_WRITEREG = 0x6
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34 DEBUG_READMEM_32BIT = 0x7
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35 DEBUG_WRITEMEM_32BIT = 0x8
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117
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36 DEBUG_RUNCORE = 0x9
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37 DEBUG_STEPCORE = 0xa
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114
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38
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115
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39 JTAG_WRITEDEBUG_32BIT = 0x35
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114
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40 JTAG_READDEBUG_32BIT = 0x36
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41
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42 # cortex M3
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43 CM3_REG_CPUID = 0xE000ED00
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44
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115
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45 # F4 specifics:
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46 STM32_FLASH_BASE = 0x08000000
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47 STM32_SRAM_BASE = 0x20000000
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48
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116
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49 FLASH_KEY1 = 0x45670123
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50 FLASH_KEY2 = 0xcdef89ab
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115
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51 # flash registers:
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116
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52 FLASH_F4_REGS_ADDR = 0x40023c00
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115
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53
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116
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54 FLASH_F4_KEYR = FLASH_F4_REGS_ADDR + +0x04
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115
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55 FLASH_F4_SR = FLASH_F4_REGS_ADDR + 0x0c
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56 FLASH_F4_CR = FLASH_F4_REGS_ADDR + 0x10
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57
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58 FLASH_F4_CR_START = 16
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59 FLASH_F4_CR_LOCK = 31
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60 FLASH_CR_PG = 0
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61 FLASH_F4_CR_SER = 1
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62 FLASH_CR_MER = 2
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63 FLASH_F4_CR_SNB = 3
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64 FLASH_F4_CR_SNB_MASK = 0x38
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65 FLASH_F4_SR_BSY = 16
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66
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67 def calculate_F4_sector(address):
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68 """
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69 from 0x8000000 to 0x80FFFFF
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70 4 sectors of 0x4000 (16 kB)
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71 1 sector of 0x10000 (64 kB)
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72 7 of 0x20000 (128 kB)
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73 """
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74 sectorsizes = [0x4000] * 4 + [0x10000] + [0x20000] * 7
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75 sectorstarts = []
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76 a = STM32_FLASH_BASE
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77 for sectorsize in sectorsizes:
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78 sectorstarts.append(a)
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79 a += sectorsize
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80 # linear search:
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81 sec = 0
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82 while sec < len(sectorsizes) and address >= sectorstarts[sec]:
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83 sec += 1
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84 sec -= 1 # one back.
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85 return sec, sectorsizes[sec]
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86
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87 def calcSectors(address, size):
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88 off = 0
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89 sectors = []
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90 while off < size:
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91 sectornum, sectorsize = calculate_F4_sector(address + off)
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92 sectors.append((sectornum, sectorsize))
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93 off += sectorsize
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94 return sectors
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95
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114
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96 class STLink:
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119
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97 """ ST link interface code """
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98 def __init__(self, stlink2=None):
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99 if not stlink2:
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100 context = UsbContext()
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101 stlink2s = list(filter(checkDevice, context.DeviceList))
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102 if not stlink2s:
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103 raise STLinkException('Could not find an ST link')
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104 if len(stlink2s) > 1:
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105 print('More then one stlink2 found, picking first one')
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106 stlink2 = stlink2s[0]
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107 self.stlink2 = stlink2
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108 def open(self):
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119
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109 self.devHandle = self.stlink2.open()
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114
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110 if self.devHandle.Configuration != 1:
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111 self.devHandle.Configuration = 1
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112 self.devHandle.claimInterface(0)
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116
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113
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114 # First initialization:
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115 if self.CurrentMode == DFU_MODE:
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116 self.exitDfuMode()
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117 if self.CurrentMode != DEBUG_MODE:
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118 self.enterSwdMode()
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119 self.reset()
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114
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120 def close(self):
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117
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121 # TODO
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114
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122 pass
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115
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123
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124 # modes:
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113
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125 def getCurrentMode(self):
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114
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126 cmd = bytearray(16)
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127 cmd[0] = GET_CURRENT_MODE
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128 reply = self.send_recv(cmd, 2) # Expect 2 bytes back
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129 return reply[0]
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113
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130 CurrentMode = property(getCurrentMode)
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114
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131 @property
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132 def CurrentModeString(self):
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133 modes = {DFU_MODE: 'dfu', MASS_MODE: 'massmode', DEBUG_MODE:'debug'}
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134 return modes[self.CurrentMode]
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135 def exitDfuMode(self):
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136 cmd = bytearray(16)
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115
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137 cmd[0:2] = DFU_COMMAND, DFU_EXIT
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114
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138 self.send_recv(cmd)
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139 def enterSwdMode(self):
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140 cmd = bytearray(16)
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115
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141 cmd[0:3] = DEBUG_COMMAND, DEBUG_ENTER, DEBUG_ENTER_SWD
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114
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142 self.send_recv(cmd)
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143 def exitDebugMode(self):
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144 cmd = bytearray(16)
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115
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145 cmd[0:2] = DEBUG_COMMAND, DEBUG_EXIT
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114
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146 self.send_recv(cmd)
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147
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148 def getVersion(self):
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149 cmd = bytearray(16)
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150 cmd[0] = GET_VERSION
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151 data = self.send_recv(cmd, 6) # Expect 6 bytes back
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152 # Parse 6 bytes into various versions:
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153 b0, b1, b2, b3, b4, b5 = data
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154 stlink_v = b0 >> 4
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155 jtag_v = ((b0 & 0xf) << 2) | (b1 >> 6)
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156 swim_v = b1 & 0x3f
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157 vid = (b3 << 8) | b2
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158 pid = (b5 << 8) | b4
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159
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160 return 'stlink={0} jtag={1} swim={2} vid:pid={3:04X}:{4:04X}'.format(\
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161 stlink_v, jtag_v, swim_v, vid, pid)
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162 Version = property(getVersion)
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163
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164 @property
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165 def ChipId(self):
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166 return self.read_debug32(0xE0042000)
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167 @property
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168 def CpuId(self):
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169 u32 = self.read_debug32(CM3_REG_CPUID)
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170 implementer_id = (u32 >> 24) & 0x7f
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171 variant = (u32 >> 20) & 0xf
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172 part = (u32 >> 4) & 0xfff
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173 revision = u32 & 0xf
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174 return implementer_id, variant, part, revision
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175
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117
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176 def getStatus(self):
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114
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177 cmd = bytearray(16)
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115
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178 cmd[0:2] = DEBUG_COMMAND, DEBUG_GETSTATUS
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114
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179 reply = self.send_recv(cmd, 2)
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180 return reply[0]
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117
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181 Status = property(getStatus)
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182 @property
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183 def StatusString(self):
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184 s = self.Status
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185 statii = {CORE_RUNNING: 'CORE RUNNING', CORE_HALTED: 'CORE HALTED'}
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186 if s in statii:
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187 return statii[s]
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188
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116
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189 def reset(self):
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190 cmd = bytearray(16)
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191 cmd[0:2] = DEBUG_COMMAND, DEBUG_RESETSYS
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192 self.send_recv(cmd, 2)
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113
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193
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115
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194 # debug commands:
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114
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195 def step(self):
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196 cmd = bytearray(16)
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115
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197 cmd[0:2] = DEBUG_COMMAND, DEBUG_STEPCORE
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114
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198 self.send_recv(cmd, 2)
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199 def run(self):
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200 cmd = bytearray(16)
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115
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201 cmd[0:2] = DEBUG_COMMAND, DEBUG_RUNCORE
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114
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202 self.send_recv(cmd, 2)
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115
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203
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204 # flashing commands:
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205 def writeFlash(self, address, content):
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206 # TODO:
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207 flashsize = 0x100000 # fixed 1 MB for now..
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208 print('WARNING: using 1 MB as flash size')
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209 pagesize = 0x4000 # fixed for now!
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210
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211 # Check address range:
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212 if address < STM32_FLASH_BASE:
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213 raise STLinkException('Flashing below flash start')
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214 if address + len(content) > STM32_FLASH_BASE + flashsize:
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215 raise STLinkException('Flashing above flash size')
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216 if address & 1 == 1:
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217 raise STLinkException('Unaligned flash')
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218 if len(content) & 1 == 1:
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219 print('unaligned length, padding with zero')
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220 content += bytes([0])
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221 if address & (pagesize - 1) != 0:
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222 raise STLinkException('Address not aligned with pagesize')
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114
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223
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115
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224 # erase required space
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225 sectors = calcSectors(address, len(content))
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226 print('erasing {0} sectors'.format(len(sectors)))
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227 for sector, secsize in sectors:
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119
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228 print('erasing sector {0} of {1} bytes'.format(sector, secsize))
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115
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229 self.eraseFlashSector(sector)
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230
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231 # program pages:
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116
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232 self.unlockFlashIf()
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119
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233 self.writeFlashCrPsiz(2) # writes are 32 bits aligned
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117
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234 self.setFlashCrPg()
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235
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119
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236 print('writing {0} bytes'.format(len(content)), end='')
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117
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237 offset = 0
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119
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238 t1 = time.time()
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117
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239 while offset < len(content):
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240 size = len(content) - offset
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241 if size > 0x8000:
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242 size = 0x8000
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243
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119
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244 chunk = content[offset:offset + size]
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245 while len(chunk) % 4 != 0:
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246 print('padding chunk')
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247 chunk = chunk + bytes([0])
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248
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249 # Use simple mem32 writes:
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250 self.write_mem32(address + offset, chunk)
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251
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117
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252 offset += size
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119
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253 print('.', end='', flush=True)
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254 t2 = time.time()
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255 print('Done!')
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256 print('Speed: {0} bytes/second'.format(len(content)/(t2-t1)))
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115
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257
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116
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258 self.lockFlash()
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259
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115
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260 # verfify program:
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261 self.verifyFlash(address, content)
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262 def eraseFlashSector(self, sector):
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263 self.waitFlashBusy()
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264 self.unlockFlashIf()
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265 self.writeFlashCrSnb(sector)
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266 self.setFlashCrStart()
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267 self.waitFlashBusy()
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268 self.lockFlash()
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116
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269 def eraseFlash(self):
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270 self.waitFlashBusy()
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271 self.unlockFlashIf()
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272 self.setFlashCrMer()
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273 self.setFlashCrStart()
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274 self.waitFlashBusy()
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275 self.clearFlashCrMer()
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276 self.lockFlash()
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115
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277 def verifyFlash(self, address, content):
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116
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278 device_content = self.readFlash(address, len(content))
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279 ok = content == device_content
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280 print('Verify:', ok)
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281 def readFlash(self, address, size):
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119
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282 print('Reading {1} bytes from 0x{0:X}'.format(address, size), end='')
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115
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283 offset = 0
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116
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284 tmp_size = 0x1800
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115
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285 t1 = time.time()
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116
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286 image = bytes()
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287 while offset < size:
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115
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288 # Correct for last page:
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116
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289 if offset + tmp_size > size:
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290 tmp_size = size - offset
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115
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291
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292 # align size to 4 bytes:
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116
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293 aligned_size = tmp_size
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115
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294 while aligned_size % 4 != 0:
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295 aligned_size += 1
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296
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297 mem = self.read_mem32(address + offset, aligned_size)
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116
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298 image += mem[:tmp_size]
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115
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299
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300 # indicate progress:
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116
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301 print('.', end='', flush=True)
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115
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302
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303 # increase for next piece:
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116
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304 offset += tmp_size
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115
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305 t2 = time.time()
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116
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306 assert size == len(image)
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119
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307 print('Done!')
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308 print('Speed: {0} bytes/second'.format(size/(t2-t1)))
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116
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309 return image
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115
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310 def readFlashSr(self):
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311 return self.read_debug32(FLASH_F4_SR)
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312 def readFlashCr(self):
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313 return self.read_debug32(FLASH_F4_CR)
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119
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314 def writeFlashCr(self, x):
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315 self.write_debug32(FLASH_F4_CR, x)
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115
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316 def writeFlashCrSnb(self, sector):
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317 x = self.readFlashCr()
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318 x &= ~FLASH_F4_CR_SNB_MASK
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319 x |= sector << FLASH_F4_CR_SNB
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320 x |= 1 << FLASH_F4_CR_SER
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119
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321 self.writeFlashCr(x)
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116
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322 def setFlashCrMer(self):
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323 x = self.readFlashCr()
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324 x |= 1 << FLASH_CR_MER
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119
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325 self.writeFlashCr(x)
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117
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326 def setFlashCrPg(self):
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327 x = self.readFlashCr()
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328 x |= 1 << FLASH_CR_PG
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119
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329 self.writeFlashCr(x)
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117
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330 def writeFlashCrPsiz(self, n):
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331 x = self.readFlashCr()
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332 x &= (0x3 << 8)
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333 x |= n << 8
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119
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334 self.writeFlashCr(x)
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116
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335 def clearFlashCrMer(self):
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336 x = self.readFlashCr()
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337 x &= ~(1 << FLASH_CR_MER)
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119
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338 self.writeFlashCr(x)
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115
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339 def setFlashCrStart(self):
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340 x = self.readFlashCr()
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341 x |= 1 << FLASH_F4_CR_START
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119
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342 self.writeFlashCr(x)
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115
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343 def isFlashBusy(self):
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344 mask = 1 << FLASH_F4_SR_BSY
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345 sr = self.readFlashSr()
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119
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346 # Check for error bits:
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347 errorbits = {}
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348 errorbits[7] = 'Programming sequence error'
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349 errorbits[6] = 'Programming parallelism error'
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350 errorbits[5] = 'Programming alignment error'
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351 errorbits[4] = 'Write protection error'
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352 errorbits[1] = 'Operation error'
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353 #errorbits[0] = 'End of operation'
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354 for bit, msg in errorbits.items():
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355 if sr & (1 << bit) == (1 << bit):
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356 raise STLinkException(msg)
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357
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115
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358 return sr & mask == mask
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359 def waitFlashBusy(self):
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360 """ block until flash operation completes. """
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361 while self.isFlashBusy():
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362 pass
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363 def isFlashLocked(self):
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364 cr = self.readFlashCr()
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365 mask = 1 << FLASH_F4_CR_LOCK
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366 return cr & mask == mask
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367 def unlockFlashIf(self):
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368 if self.isFlashLocked():
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369 self.write_debug32(FLASH_F4_KEYR, FLASH_KEY1)
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370 self.write_debug32(FLASH_F4_KEYR, FLASH_KEY2)
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371 if self.isFlashLocked():
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372 raise STLinkException('Failed to unlock')
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373 def lockFlash(self):
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116
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374 x = self.readFlashCr() | (1 << FLASH_F4_CR_LOCK)
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375 self.write_debug32(FLASH_F4_CR, x)
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115
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376
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114
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377 # Helper 1 functions:
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115
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378 def write_debug32(self, address, value):
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379 cmd = bytearray(16)
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380 cmd[0:2] = DEBUG_COMMAND, JTAG_WRITEDEBUG_32BIT
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119
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381 cmd[2:10] = struct.pack('<II', address, value)
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115
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382 self.send_recv(cmd, 2)
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114
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383 def read_debug32(self, address):
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384 cmd = bytearray(16)
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115
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385 cmd[0:2] = DEBUG_COMMAND, JTAG_READDEBUG_32BIT
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114
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386 cmd[2:6] = struct.pack('<I', address) # pack into u32 little endian
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387 reply = self.send_recv(cmd, 8)
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388 return struct.unpack('<I', reply[4:8])[0]
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115
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389 def write_reg(self, reg, value):
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390 cmd = bytearray(16)
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391 cmd[0:3] = DEBUG_COMMAND, DEBUG_WRITEREG, reg
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392 cmd[3:7] = struct.pack('<I', value)
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393 r = self.send_recv(cmd, 2)
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394 def read_reg(self, reg):
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395 cmd = bytearray(16)
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396 cmd[0:3] = DEBUG_COMMAND, DEBUG_READREG, reg
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397 reply = self.send_recv(cmd, 4)
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398 return struct.unpack('<I', reply)[0]
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116
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399 def write_mem32(self, address, content):
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400 assert len(content) % 4 == 0
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401 cmd = bytearray(16)
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402 cmd[0:2] = DEBUG_COMMAND, DEBUG_WRITEMEM_32BIT
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119
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403 cmd[2:8] = struct.pack('<IH', address, len(content))
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116
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404 self.send_recv(cmd)
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405 self.send_recv(content)
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115
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406 def read_mem32(self, address, length):
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407 assert length % 4 == 0
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408 cmd = bytearray(16)
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409 cmd[0:2] = DEBUG_COMMAND, DEBUG_READMEM_32BIT
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119
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410 cmd[2:8] = struct.pack('<IH', address, length)
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115
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411 reply = self.send_recv(cmd, length) # expect memory back!
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412 return reply
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114
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413
|
|
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414 # Helper 2 functions:
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415 def send_recv(self, tx, rxsize=0):
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115
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416 """ Helper function that transmits and receives data in bulk mode. """
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114
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417 # TODO: we could use here the non-blocking libusb api.
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418 tx = bytes(tx)
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|
116
|
419 #assert len(tx) == 16
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114
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420 self.devHandle.bulkWrite(2, tx) # write to endpoint 2
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421 if rxsize > 0:
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422 return self.devHandle.bulkRead(1, rxsize) # read from endpoint 1
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423
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|
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424 knownChipIds = {0x1: 'x'}
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425
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426 if __name__ == '__main__':
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|
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427 # Test program
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428 sl = STLink()
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|
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429 sl.open()
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430 print('version:', sl.Version)
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|
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431 print('mode before doing anything:', sl.CurrentModeString)
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|
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432 if sl.CurrentMode == DFU_MODE:
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433 sl.exitDfuMode()
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|
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434 sl.enterSwdMode()
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|
|
435 print('mode after entering swd mode:', sl.CurrentModeString)
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|
|
436
|
|
|
437 i = sl.ChipId
|
|
|
438 if i in knownChipIds:
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|
|
439 print('chip id: 0x{0:X} -> {1}'.format(i, knownChipIds[i]))
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|
|
440 else:
|
|
|
441 print('chip id: 0x{0:X}'.format(i))
|
|
|
442 print('cpu: {0}'.format(sl.CpuId))
|
|
|
443
|
|
117
|
444 print('status: {0}'.format(sl.StatusString))
|
|
114
|
445
|
|
115
|
446 #time.sleep(2.2)
|
|
|
447
|
|
|
448 # test registers:
|
|
|
449 sl.write_reg(3, 0x1337)
|
|
116
|
450 sl.write_reg(2, 0x1332)
|
|
117
|
451 sl.write_reg(6, 0x12345)
|
|
115
|
452 assert sl.read_reg(3) == 0x1337
|
|
116
|
453 assert sl.read_reg(2) == 0x1332
|
|
117
|
454 assert sl.read_reg(6) == 0x12345
|
|
114
|
455
|
|
|
456 sl.exitDebugMode()
|
|
|
457 print('mode at end:', sl.CurrentModeString)
|
|
|
458
|
|
|
459 sl.close()
|
|
119
|
460 print('Test succes!')
|
|
114
|
461
|
