Mercurial > avr_jtag
comparison tests/bypasstest.py @ 13:1ea479d26fce tip
Make sure shifting phase and add bypass.py.
- shifting phase is started after entering SHIFT state
Transition from CAP to SHIFT does not induce shifting.
- shifting phase is stoped after leaving SHIFT state.
Transition from SHIFT to EXIT1 also induce a bit of shifting.
| author | Thinker K.F. Li <thinker@branda.to> |
|---|---|
| date | Wed, 25 Feb 2009 20:08:29 +0800 |
| parents | |
| children |
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| 12:68ecd42850d3 | 13:1ea479d26fce |
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| 1 import sys | |
| 2 import os | |
| 3 import fcntl | |
| 4 import jtagdev | |
| 5 | |
| 6 if len(sys.argv) != 2: | |
| 7 print >>sys.stderr, 'Usage: %s <UART Port>' % (sys.argv[0]) | |
| 8 sys.exit(1) | |
| 9 uart_fname = sys.argv[1] | |
| 10 | |
| 11 try: | |
| 12 uart_fo = file(uart_fname, 'r+b') | |
| 13 except IOError, e: | |
| 14 print e | |
| 15 sys.exit(1) | |
| 16 pass | |
| 17 | |
| 18 flags = fcntl.fcntl(uart_fo, fcntl.F_GETFL) | |
| 19 fcntl.fcntl(uart_fo, fcntl.F_SETFL, os.O_NONBLOCK | flags) | |
| 20 | |
| 21 jtagdev.debug_frame = 1 | |
| 22 | |
| 23 dev = jtagdev.jtagdev(uart_fo) | |
| 24 | |
| 25 dev.reset() | |
| 26 dev.wait_reply() | |
| 27 | |
| 28 dev.idle(); | |
| 29 dev.wait_reply() | |
| 30 | |
| 31 dev.go_shift_IR() | |
| 32 dev.wait_reply() | |
| 33 | |
| 34 dev.shift_IR_n_out('\x0f', 4) | |
| 35 dev.wait_reply() | |
| 36 | |
| 37 dev.go_shift_DR() | |
| 38 dev.wait_reply() | |
| 39 | |
| 40 dev.shift_DR_n_out('\x01' * 128, 1024) | |
| 41 dev.wait_reply() | |
| 42 | |
| 43 dev.go_shift_DR() | |
| 44 dev.wait_reply() | |
| 45 | |
| 46 dev.shift_DR_n_out('\xff\xff', 16) | |
| 47 dev.wait_reply() |