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//Uninitialized memory access
author Ritor1
date Wed, 23 Jul 2014 01:18:24 +0600
parents b3009adc0e2f
children
line wrap: on
line source

$!
$! Generated by genbuild.py
$!
$ set default swig_root:[vms]
$
$ @swig_root:[vms]build_init
$ @swig_root:[vms.scripts]compil_cparse.com
$ @swig_root:[vms.scripts]compil_doh.com
$ @swig_root:[vms.scripts]compil_modules1_1.com
$ @swig_root:[vms.scripts]compil_preprocessor.com
$ @swig_root:[vms.scripts]compil_swig.com
$
$ set default swig_root:[vms]
$
$ @swig_root:[vms]build_end