Mercurial > lcfOS
changeset 289:bd2593de3ff8
Semifix burn2
| author | Windel Bouwman |
|---|---|
| date | Thu, 21 Nov 2013 15:46:50 +0100 |
| parents | a747a45dcd78 |
| children | 7b38782ed496 |
| files | python/c3/analyse.py python/c3/astnodes.py python/c3/builder.py python/c3/parser.py python/ide.py python/ppci/errors.py python/stm32.py python/zcc.py test/c3examples/burn2.c3 test/testzcc.py |
| diffstat | 10 files changed, 55 insertions(+), 18 deletions(-) [+] |
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--- a/python/c3/analyse.py Thu Nov 21 14:26:13 2013 +0100 +++ b/python/c3/analyse.py Thu Nov 21 15:46:50 2013 +0100 @@ -71,7 +71,6 @@ def analyzePackage(self, pkg, packageDict): self.ok = True # Prepare top level scope and set scope to all objects: - AddScope(self.diag).addScope(pkg) self.logger.info('Resolving imports for package {}'.format(pkg.name)) # Handle imports: @@ -91,7 +90,23 @@ # Reference fixups: def resolveDesignator(self, d, scope): - assert type(d) is Designator, type(d) + assert isinstance(d, Designator), type(d) + assert type(scope) is Scope + if scope.hasSymbol(d.tname): + s = scope.getSymbol(d.tname) + if isinstance(d, ImportDesignator): + if s.innerScope.hasSymbol(d.vname): + return s.innerScope.getSymbol(d.vname) + else: + if hasattr(s, 'addRef'): + # TODO: make this nicer + s.addRef(None) + return s + else: + self.error('Cannot resolve name {0}'.format(d.tname), d.loc) + + def resolveImportDesignator(self, d, scope): + assert isinstance(d, ImportDesignator), type(d) assert type(scope) is Scope if scope.hasSymbol(d.tname): s = scope.getSymbol(d.tname) @@ -114,7 +129,7 @@ offset += theType(mem.typ).bytesize t.bytesize = offset return t - elif type(t) is Designator: + elif isinstance(t, Designator): t = self.resolveDesignator(t, scope) if t: return self.resolveType(t, scope)
--- a/python/c3/astnodes.py Thu Nov 21 14:26:13 2013 +0100 +++ b/python/c3/astnodes.py Thu Nov 21 15:46:50 2013 +0100 @@ -32,6 +32,16 @@ def __repr__(self): return 'DESIGNATOR {}'.format(self.tname) + +class ImportDesignator(Designator): + def __init__(self, tname, vname, loc): + super().__init__(tname, loc) + self.vname = vname + + def __repr__(self): + return 'IMPORT DESIGNATOR {}:{}'.format(self.tname, self.vname) + + """ Type classes
--- a/python/c3/builder.py Thu Nov 21 14:26:13 2013 +0100 +++ b/python/c3/builder.py Thu Nov 21 15:46:50 2013 +0100 @@ -1,6 +1,7 @@ import logging import ppci from . import Parser, TypeChecker, Analyzer, CodeGenerator +from .analyse import AddScope class Builder: @@ -36,11 +37,16 @@ continue # Store for later use: packages[pkg.name] = pkg + # Fix scopes: for pkg in packages.values(): - # TODO: merge the two below? + if not AddScope(self.diag).addScope(pkg): + self.ok = False + # TODO: fix error handling better + for pkg in packages.values(): if not self.al.analyzePackage(pkg, packages): self.ok = False continue + for pkg in packages.values(): if not self.tc.checkPackage(pkg): self.ok = False continue
--- a/python/c3/parser.py Thu Nov 21 14:26:13 2013 +0100 +++ b/python/c3/parser.py Thu Nov 21 15:46:50 2013 +0100 @@ -88,7 +88,11 @@ def parseDesignator(self): """ A designator designates an object """ name = self.Consume('ID') - return astnodes.Designator(name.val, name.loc) + if self.hasConsumed(':'): + name2 = self.Consume('ID') + return astnodes.ImportDesignator(name.val, name2.val, name.loc) + else: + return astnodes.Designator(name.val, name.loc) # Type system def parseTypeSpec(self):
--- a/python/ide.py Thu Nov 21 14:26:13 2013 +0100 +++ b/python/ide.py Thu Nov 21 15:46:50 2013 +0100 @@ -290,7 +290,6 @@ if not ce: return fn = ce.FileName - wd = os.path.dirname(fn) self.diag.clear() outs = outstream.TextOutputStream() if not zcc.zcc([io.StringIO(ce.Source)], [], outs, self.diag): @@ -304,10 +303,10 @@ if not ce: return fn = ce.FileName - wd = os.path.dirname(fn) self.diag.clear() outs = outstream.TextOutputStream() - if not zcc.zcc([io.StringIO(ce.Source)], [], outs, self.diag): + imps = [open(ce.FileName, 'r') for ce in self.allChildren() if ce.FileName and ce.FileName != fn] + if not zcc.zcc([open(fn, 'r')], imps, outs, self.diag): # Set errors: self.builderrors.setErrorList(self.diag.diags) ce.setErrors(self.diag.diags)
--- a/python/ppci/errors.py Thu Nov 21 14:26:13 2013 +0100 +++ b/python/ppci/errors.py Thu Nov 21 15:46:50 2013 +0100 @@ -11,7 +11,8 @@ self.msg = msg self.loc = loc if loc: - assert type(loc) is SourceLocation, '{0} must be SourceLocation'.format(type(loc)) + assert type(loc) is SourceLocation, \ + '{0} must be SourceLocation'.format(type(loc)) self.row = loc.row self.col = loc.col else: @@ -19,9 +20,9 @@ def __repr__(self): if self.row: - return 'Compilererror: "{0}" at row {1}'.format(self.msg, self.row) + return '"{0}" at row {1}'.format(self.msg, self.row) else: - return 'Compilererror: "{0}"'.format(self.msg) + return '"{0}"'.format(self.msg) def printError(source, e): def printLine(row, txt):
--- a/python/stm32.py Thu Nov 21 14:26:13 2013 +0100 +++ b/python/stm32.py Thu Nov 21 15:46:50 2013 +0100 @@ -247,6 +247,7 @@ raise STLinkException(msg) return sr & mask == mask + @registerDevice(0x10016413) class Stm32F40x(Stm32F4): """ STM32F40x and STM32F41x device series """ @@ -261,4 +262,3 @@ 7 of 0x20000 (128 kB) """ self.sectorsizes = [0x4000] * 4 + [0x10000] + [0x20000] * 7 -
--- a/python/zcc.py Thu Nov 21 14:26:13 2013 +0100 +++ b/python/zcc.py Thu Nov 21 15:46:50 2013 +0100 @@ -12,14 +12,17 @@ import outstream import hexfile + logformat='%(asctime)s|%(levelname)s|%(name)s|%(message)s' + def logLevel(s): numeric_level = getattr(logging, s.upper(), None) if not isinstance(numeric_level, int): raise ValueError('Invalid log level: {}'.format(s)) return numeric_level + # Parse arguments: parser = argparse.ArgumentParser(description='lcfos Compiler') # Input: @@ -51,7 +54,7 @@ # Optimization passes: optimize(ircode) - + if dumpir: ircode.dump()
--- a/test/c3examples/burn2.c3 Thu Nov 21 14:26:13 2013 +0100 +++ b/test/c3examples/burn2.c3 Thu Nov 21 15:46:50 2013 +0100 @@ -27,14 +27,14 @@ return; } - var stm32f4xx.RCC_Type RCC; - RCC = cast<RCC_Type>(0x40023800); + var stm32f4xx:RCC_Type RCC; + RCC = cast<stm32f4xx:RCC_Type>(0x40023800); // Enable the clock to port D: RCC->AHB1ENR = RCC->AHB1ENR | (1 << 3); // Memory mapped control registers: - var GPIO_Type GPIOD; - GPIOD = cast<GPIO_Type>(0x40020C00); + var stm32f4xx:GPIO_Type GPIOD; + GPIOD = cast<stm32f4xx:GPIO_Type>(0x40020C00); // PD13 == output (01) GPIOD->MODER = (1 << (pin << 1));