# HG changeset patch # User Windel Bouwman # Date 1373901637 -7200 # Node ID ff40407c024016991b62539a872487cfb5dbedc3 # Parent 83781bd10fdb8e90a6587d16b1bcc9cfcf8a348e Fix ALabel to Label diff -r 83781bd10fdb -r ff40407c0240 python/asm.py --- a/python/asm.py Sun Jul 14 19:29:21 2013 +0200 +++ b/python/asm.py Mon Jul 15 17:20:37 2013 +0200 @@ -193,6 +193,7 @@ def back_patch(self): """ Fix references to earlier labels """ pass + #self.output.backpatch() if __name__ == '__main__': diff -r 83781bd10fdb -r ff40407c0240 python/codegenarm.py --- a/python/codegenarm.py Sun Jul 14 19:29:21 2013 +0200 +++ b/python/codegenarm.py Mon Jul 15 17:20:37 2013 +0200 @@ -1,5 +1,5 @@ import ir -from target import Label, Comment +from target import Label, Comment, Alignment, LabelRef, Imm32 import cortexm3 as arm from ppci import CompilerError @@ -20,16 +20,16 @@ self.outs.selectSection('data') for gvar in ircode.Variables: - self.emit(ALabel(gvar.name)) + self.emit(Label(gvar.name)) # TODO: use initial value: - self.emit(arm.dcd_ins(0)) + self.dcd(0) self.imms = [] # list with immediates relative to PC. self.outs.selectSection('code') # Manually inserted startup code: - self.emit(arm.dcd_ins(0x20000678)) # initial stack ptr - self.emit(arm.dcd_ins(0x08000401)) # reset vector + self.dcd(0x20000678) # initial stack ptr + self.dcd(0x08000401) # reset vector for f in ircode.Functions: # Add global variable addresses to immediate list: @@ -45,13 +45,18 @@ for ins in bb.Instructions: self.generateInstruction(ins) - self.outs.align(4) + self.align() while self.imms: l, v = self.imms.pop() self.emit(Label(l)) - self.emit(arm.dcd_ins(v)) - self.outs.align(4) + self.dcd(v) + self.align() + def dcd(self, x): + self.emit(arm.dcd_ins(Imm32(x))) + + def align(self): + self.outs.emit(Alignment(4)) # Helper functions: def getStack(self, v): off = self.stack_frame.index(v) @@ -61,7 +66,7 @@ return self.getStack(v) def getGlobal(self, r, g): _global_address = g.name + '__global' - self.emit(arm.ldr_pcrel(r, ALabel(_global_address))) + self.emit(arm.ldr_pcrel(r, LabelRef(_global_address))) def loadStack(self, reg, val): self.emit(arm.ldr_sprel(reg, arm.MemSpRel(self.getStack(val)))) def comment(self, txt): @@ -74,7 +79,7 @@ self.emit(arm.jmp_ins(tgt)) elif type(ins) is ir.ImmLoad: lname = ins.target.name + '_ivalue' - self.emit(arm.ldr_pcrel(arm.r0, Label(lname))) + self.emit(arm.ldr_pcrel(arm.r0, LabelRef(lname))) self.imms.append((lname, ins.value)) self.emit(arm.str_sprel(arm.r0, arm.MemSpRel(self.addStack(ins.target)))) elif type(ins) is ir.Store: @@ -113,12 +118,12 @@ self.loadStack(arm.r0, ins.a) self.loadStack(arm.r1, ins.b) self.emit(arm.cmp_ins(arm.r1, arm.r0)) - tgt_yes = ALabel(ins.lab1.name) + tgt_yes = Label(ins.lab1.name) if ins.cond == '==': self.emit(arm.beq_ins(tgt_yes)) else: print('TODO', ins.cond) - tgt_no = ALabel(ins.lab2.name) + tgt_no = Label(ins.lab2.name) self.emit(arm.jmp_ins(tgt_no)) elif type(ins) is ir.Alloc: # Local variables are added to stack diff -r 83781bd10fdb -r ff40407c0240 python/cortexm3.py --- a/python/cortexm3.py Sun Jul 14 19:29:21 2013 +0200 +++ b/python/cortexm3.py Mon Jul 15 17:20:37 2013 +0200 @@ -1,5 +1,5 @@ import struct, types -from target import Register, Instruction, Target, Imm8, Label, Imm3 +from target import Register, Instruction, Target, Imm8, Label, Imm3, LabelRef, Imm32 from asmnodes import ASymbol, ANumber, AUnop, ABinop from ppci import CompilerError import ir @@ -195,10 +195,14 @@ class ArmInstruction(Instruction): pass + +@armtarget.instruction class dcd_ins(ArmInstruction): mnemonic = 'dcd' + operands = (Imm32,) def __init__(self, expr): - self.expr = expr + assert isinstance(expr, Imm32) + self.expr = expr.imm def encode(self): return u32(self.expr) @@ -263,22 +267,28 @@ class ldr_pcrel(ArmInstruction): """ ldr Rt, [PC, imm8], store value into memory """ mnemonic = 'ldr' - operands = (RegOp, MemPcRel) + operands = (RegOp, LabelRef) def __init__(self, rt, label): + assert isinstance(label, LabelRef) self.rt = rt self.label = label self.offset = 0 def resolve(self, f): - la = f(self.label) + la = f(self.label.name) + print(la) self.offset = (la - self.address) + 4 + if self.offset < 0: + self.offset = 0 def encode(self): rt = self.rt.num assert rt < 8 imm8 = self.offset >> 2 assert imm8 < 256 + assert imm8 >= 0 h = (0x9 << 11) | (rt << 8) | imm8 + print(hex(h)) return u16(h) def __repr__(self): @@ -439,10 +449,10 @@ @armtarget.instruction class jmp_ins(ArmInstruction): - operands = (ALabel,) + operands = (Label,) mnemonic = 'jmp' def __init__(self, target_label): - assert type(target_label) is ALabel + assert type(target_label) is Label self.target = target_label def fixUp(self): pass @@ -454,10 +464,10 @@ @armtarget.instruction class beq_ins(ArmInstruction): - operands = (ALabel,) + operands = (Label,) mnemonic = 'beq' def __init__(self, target_label): - assert type(target_label) is ALabel + assert type(target_label) is Label self.target = target_label def fixUp(self): pass diff -r 83781bd10fdb -r ff40407c0240 python/outstream.py --- a/python/outstream.py Sun Jul 14 19:29:21 2013 +0200 +++ b/python/outstream.py Mon Jul 15 17:20:37 2013 +0200 @@ -16,20 +16,17 @@ assert isinstance(item, Instruction) self.sections[self.currentSection].append(item) - def align(self, alignment): - self.emit(Alignment(alignment)) - def selectSection(self, s): self.currentSection = s if not s in self.sections: self.sections[s] = [] - def getLabelAddress(self, l): - assert isinstance(l, Label) + def getLabelAddress(self, lname): + assert isinstance(lname, str) for s in self.sections.values(): for i in s: if type(i) is Label: - if i.name == l.name: + if i.name == lname: return i.address return 0 @@ -62,7 +59,10 @@ assert type(insword) is bytes insword = binascii.hexlify(bytes(reversed(insword))).decode('ascii') asm = str(i) - print(' 0x{0:08x} 0x{1} {2}'.format(addr, insword, asm)) + if len(insword) == 0: + print(' {}'.format(asm)) + else: + print(' 0x{0:08x} 0x{1} {2}'.format(addr, insword, asm)) class TextOutputStream(OutputStream): pass diff -r 83781bd10fdb -r ff40407c0240 python/target.py --- a/python/target.py Sun Jul 14 19:29:21 2013 +0200 +++ b/python/target.py Mon Jul 15 17:20:37 2013 +0200 @@ -1,4 +1,4 @@ -from asmnodes import ASymbol, AInstruction, ALabel, ANumber +from asmnodes import ASymbol, AInstruction, ANumber from ppci import CompilerError """ @@ -33,6 +33,27 @@ if type(vop) is ANumber and vop.number < 8: return cls(vop.number) +class Imm32: + def __init__(self, imm): + assert imm < 2**32 + assert type(imm) is int + self.imm = imm + + @classmethod + def Create(cls, vop): + if type(vop) is ANumber and vop.number < 2**32: + return cls(vop.number) + + +class LabelRef: + def __init__(self, name): + self.name = name + + @classmethod + def Create(cls, vop): + if type(vop) is ASymbol: + return cls(vop.name) + class Instruction: def encode(self): raise NotImplementedError('Instruction {0} has no encode yet, TODO'.format(type(self))) @@ -49,25 +70,39 @@ self.name = name self.address = 0 + def __repr__(self): + return '{}:'.format(self.name) + + def encode(self): + return bytes() + @classmethod def Create(cls, vop): if type(vop) is ASymbol: name = vop.name return cls(name) + class Comment(PseudoInstruction): def __init__(self, txt): self.txt = txt + def encode(self): + return bytes() def __repr__(self): return '; {}'.format(self.txt) + class Alignment(PseudoInstruction): def __init__(self, a): self.align = a + + def __repr__(self): + return 'ALIGN({})'.format(self.align) + def encode(self): pad = [] address = self.address - while (address % i.align) != 0: + while (address % self.align) != 0: address += 1 pad.append(0) return bytes(pad) diff -r 83781bd10fdb -r ff40407c0240 python/testzcc.py --- a/python/testzcc.py Sun Jul 14 19:29:21 2013 +0200 +++ b/python/testzcc.py Mon Jul 15 17:20:37 2013 +0200 @@ -6,7 +6,8 @@ def testBlinkDemo(self): """ Compile blink.c3 """ - args = zcc.parser.parse_args(['-d', 'stm32f4/blink.c3']) + #args = zcc.parser.parse_args(['-d', 'stm32f4/blink.c3']) + args = zcc.parser.parse_args(['stm32f4/blink.c3']) zcc.main(args) if __name__ == '__main__': diff -r 83781bd10fdb -r ff40407c0240 python/transform.py --- a/python/transform.py Sun Jul 14 19:29:21 2013 +0200 +++ b/python/transform.py Mon Jul 15 17:20:37 2013 +0200 @@ -70,7 +70,6 @@ # Check if alloc value is only used by load and store operations. assert type(allocinst) is Alloc for use in ai.value.used_by: - print(use.user, use) if not type(use.user) in [Load, Store]: # TODO: check volatile return False @@ -101,5 +100,5 @@ class Mem2RegPromotor(FunctionPass): def onFunction(self, f): # TODO - print(f) + pass