# HG changeset patch # User Windel Bouwman # Date 1376040611 -7200 # Node ID ed14e077124c9bc33152744562a490f4f71f5a27 # Parent 444b9df2ed992f9c52c6ff70cd6a4f1d67e84f96 Added conditional branch instructions diff -r 444b9df2ed99 -r ed14e077124c python/codegenarm.py --- a/python/codegenarm.py Fri Aug 09 09:05:13 2013 +0200 +++ b/python/codegenarm.py Fri Aug 09 11:30:11 2013 +0200 @@ -5,6 +5,15 @@ from ppci import CompilerError import irmach + +class InstructionSelector: + pass + + +class RegisterAllocator: + pass + + class ArmCodeGenerator: """ Simple code generator @@ -173,13 +182,17 @@ r0 = self.getreg(ins.a) r1 = self.getreg(ins.b) self.emit(arm.cmp_ins(r1, r0)) - tgt_yes = Label(ins.lab1.name) + tgt_yes = LabelRef(ins.lab1.name) if ins.cond == '==': self.emit(arm.beq_ins(tgt_yes)) + elif ins.cond == '<': + self.emit(arm.blt_ins(tgt_yes)) + elif ins.cond == '>': + self.emit(arm.bgt_ins(tgt_yes)) else: raise NotImplementedError('"{}" not covered'.format(ins.cond)) - tgt_no = Label(ins.lab2.name) - self.emit(arm.jmp_ins(tgt_no)) + tgt_no = LabelRef(ins.lab2.name) + self.emit(arm.b_ins(tgt_no)) self.freereg(ins.a, ins) self.freereg(ins.b, ins) elif type(ins) is ir.Alloc: diff -r 444b9df2ed99 -r ed14e077124c python/cortexm3.py --- a/python/cortexm3.py Fri Aug 09 09:05:13 2013 +0200 +++ b/python/cortexm3.py Fri Aug 09 11:30:11 2013 +0200 @@ -501,16 +501,31 @@ h = (0b1101 << 12) | (self.cond << 8) | imm8 return u16(h) + @armtarget.instruction class beq_ins(cond_base_ins): mnemonic = 'beq' cond = 0 + @armtarget.instruction -class beq_ins(cond_base_ins): +class bne_ins(cond_base_ins): mnemonic = 'bne' cond = 1 + +@armtarget.instruction +class blt_ins(cond_base_ins): + mnemonic = 'blt' + cond = 0b1011 + + +@armtarget.instruction +class blt_ins(cond_base_ins): + mnemonic = 'bgt' + cond = 0b1100 + + @armtarget.instruction class push_ins(ArmInstruction): operands = (RegisterSet,) diff -r 444b9df2ed99 -r ed14e077124c python/ir/instruction.py --- a/python/ir/instruction.py Fri Aug 09 09:05:13 2013 +0200 +++ b/python/ir/instruction.py Fri Aug 09 11:30:11 2013 +0200 @@ -37,6 +37,7 @@ use_ins.replaceValue(self, v2.value) assert not self.Used + class Variable(Value): pass @@ -98,6 +99,7 @@ Parent = property(getParent, setParent) def replaceValue(self, old, new): + # TODO: make this a generic function raise NotImplementedError('{}'.format(type(self))) @property @@ -187,6 +189,7 @@ def __repr__(self): return '{} = {}'.format(self.target, self.value) + # Data operations class BinaryOperator(Instruction): def __init__(self, result, operation, value1, value2): diff -r 444b9df2ed99 -r ed14e077124c python/stm32f4/burn2.c3 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/python/stm32f4/burn2.c3 Fri Aug 09 11:30:11 2013 +0200 @@ -0,0 +1,45 @@ +/* + +This file blinks a LED on the STM32F4 discovery board. + +the board has 4 leds on PD12, PD13, PD14 and PD15 + +*/ + +package burn2; + +import stm32f4xx; + +function void init() +{ + var RCC_Type RCC; + RCC = cast(0x40023800); + + // Enable the clock to port D: + RCC->AHB1ENR = RCC->AHB1ENR | (1 << 3); + // Memory mapped control registers: + var GPIO_Type GPIOD; + GPIOD = cast(0x40020C00); + + var int pin; + pin = 15; + // PD13 == output (01) + GPIOD->MODER = (1 << (pin << 1)); + GPIOD->ODR = (1 << pin); +} + + +function void main() +{ + init(); + + var int a; + a = 0 + while (a < 1000) + { + a = a + 1; + } + + while(true) {} +} + diff -r 444b9df2ed99 -r ed14e077124c python/testasm.py --- a/python/testasm.py Fri Aug 09 09:05:13 2013 +0200 +++ b/python/testasm.py Fri Aug 09 11:30:11 2013 +0200 @@ -228,6 +228,12 @@ self.feed('eof: b eof') self.check('01e000d0 ffd1fbe7 fee7') + def testConditions(self): + self.feed('blt x') + self.feed('bgt x') + self.feed('x:') + self.check('00dbffdc') + def testBoff(self): self.feed('b henkie') self.feed('b henkie') @@ -265,6 +271,7 @@ self.feed('loop: add r6, r4, 7') self.feed('cmp r6, 5') self.check('0325 2c1c e61d 052e') + def testSequence2(self): self.feed('henkie:') self.feed('push {r1,r4,r5}')