# HG changeset patch # User Windel Bouwman # Date 1400236210 -7200 # Node ID a139da1f44f61ad3d759e90aff044b1e24d9a8e5 # Parent 2ec730e45ea1fdc13cf60b2cd2d130890e24f35b# Parent b77f3290ac79c3ca49f2376e598ffa44b885df93 Merge diff -r b77f3290ac79 -r a139da1f44f6 kernel/arch/qemu_m3/startup_m3.asm --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/kernel/arch/qemu_m3/startup_m3.asm Fri May 16 12:30:10 2014 +0200 @@ -0,0 +1,6 @@ + + +DCD 0x20000678 ; Setup stack pointer +DCD 0x08000009 ; Reset vector, jump to address 8 +B kernel_start ; Branch to main (this is actually in the interrupt vector) + diff -r b77f3290ac79 -r a139da1f44f6 kernel/arch/qemu_vexpress/archmem.c3 --- a/kernel/arch/qemu_vexpress/archmem.c3 Fri May 16 10:12:16 2014 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,4 +0,0 @@ -module archmem; -import io; - - diff -r b77f3290ac79 -r a139da1f44f6 kernel/arch/qemu_vexpress/layout.mmap --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/kernel/arch/qemu_vexpress/layout.mmap Fri May 16 12:30:10 2014 +0200 @@ -0,0 +1,12 @@ + +MEMORY image LOCATION=0x10000 SIZE=0x10000 { + SECTION(reset) + SECTION(code) + ALIGN(0x4000) + SECTION(mem_tables) +} + +MEMORY ram LOCATION=0x20000 SIZE=0x10000 { + SECTION(data) +} + diff -r b77f3290ac79 -r a139da1f44f6 kernel/arch/qemu_vexpress/start.asm --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/kernel/arch/qemu_vexpress/start.asm Fri May 16 12:30:10 2014 +0200 @@ -0,0 +1,89 @@ + +section reset + +interrupt_vector_table: +ivt_reset: B start ; 0x0 reset +ivt_undef: B undef_handler ; 0x4 undefined instruction +ivt_svc: B undef_handler ; 0x08 Supervisor call +ivt_prefetch: B undef_handler ; 0x0C prefetch abort +ivt_data: B undef_handler ; 0x10 data abort +ivt_hyptrap: B undef_handler ; 0x14 not used +ivt_irq: B undef_handler ; 0x18 IRQ +ivt_fiq: B undef_handler ; 0x18 FIQ + + +start: + +; Setup TTBR1 (translation table base register) + +ldr r0, =kernel_table0 ; pseudo instruction which loads the value of the symbol +; -KERNEL_BASE +mcr p15, 0, r0, c2, c0, 1 ; TTBR1 +mcr p15, 0, r0, c2, c0, 0 ; TTBR0 + +; Prepare the TTBCR (translation table base control register) +mov r0, 0x1 ; TBD: why set this to 1? +mcr p15, 0, r0, c2, c0, 2 + + +; Set domain 0 to manager: +mov r0, 3 +mcr p15, 0, r0, c3, c0, 0 + + +; Enable the VMSA (Virtual memory system architecture): +mrc p15, 0, r0, c1, c0, 0 +; TODO: +mov r1, 0x1 +orr r0, r0, r1 ; TODO: implement orr r0, r0, 1 +mcr p15, 0, r0, c1, c0, 0 + +; Setup stack: +mov sp, 0x30000 +BL kernel_start ; Branch to main (this is actually in the interrupt vector) +local_loop: +B local_loop + + +; Interrupt handlers: + +undef_handler: +B undef_handler + + +; Assembly language helpers: +; Called to identify the proc: +arch_pfr0: +mrc p15, 0, r0, c0, c1, 0 +mov pc, lr + +arch_pfr1: +mrc p15, 0, r0, c0, c1, 1 +mov pc, lr + +arch_mmfr0: +mrc p15, 0, r0, c0, c1, 4 +mov pc, lr + +arch_mpuir: +mrc p15, 0, r0, c0, c0, 4 +mov pc, lr + + +; Memory map tables: + +section mem_tables + +kernel_table0: + dcd 0x00000402 ; Identity map first 1 MB + dcd 0x10000402 ; Map to peripheral space 1 MB + repeat 0x5FE + dcd 0 + endrepeat + + dcd 0x00000402 ; Alias to 0x0 + + repeat 0x9FF + dcd 0 + endrepeat + diff -r b77f3290ac79 -r a139da1f44f6 kernel/arch/qemu_vexpress/startup_a9.asm --- a/kernel/arch/qemu_vexpress/startup_a9.asm Fri May 16 10:12:16 2014 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,91 +0,0 @@ - -section reset - -interrupt_vector_table: -ivt_reset: B start ; 0x0 reset -ivt_undef: B undef_handler ; 0x4 undefined instruction -ivt_svc: B undef_handler ; 0x08 Supervisor call -ivt_prefetch: B undef_handler ; 0x0C prefetch abort -ivt_data: B undef_handler ; 0x10 data abort -ivt_hyptrap: B undef_handler ; 0x14 not used -ivt_irq: B undef_handler ; 0x18 IRQ -ivt_fiq: B undef_handler ; 0x18 FIQ - - -start: - -; Setup TTBR1 (translation table base register) - -ldr r0, =kernel_table0 ; pseudo instruction which loads the value of the symbol -; -KERNEL_BASE -mcr p15, 0, r0, c2, c0, 1 ; TTBR1 -mcr p15, 0, r0, c2, c0, 0 ; TTBR0 - -; Prepare the TTBCR (translation table base control register) -mov r0, 0x1 ; TBD: why set this to 1? -mcr p15, 0, r0, c2, c0, 2 - - -; Set domain 0 to manager: -mov r0, 3 -mcr p15, 0, r0, c3, c0, 0 - - -; Enable the VMSA (Virtual memory system architecture): -mrc p15, 0, r0, c1, c0, 0 -; TODO: -mov r1, 0x1 -orr r0, r0, r1 ; TODO: implement orr r0, r0, 1 -mcr p15, 0, r0, c1, c0, 0 - -; Setup stack: -mov sp, 0x30000 -BL kernel_start ; Branch to main (this is actually in the interrupt vector) -local_loop: -B local_loop - - -; Interrupt handlers: - -undef_handler: -B undef_handler - - -; Assembly language helpers: -; Called to identify the proc: -arch_pfr0: -mrc p15, 0, r0, c0, c1, 0 -ldr r0, =kernel_table0 -mov pc, lr - -arch_pfr1: -mrc p15, 0, r0, c0, c1, 1 -mov pc, lr - -arch_mmfr0: -mrc p15, 0, r0, c0, c1, 4 -mov pc, lr - - -arch_mpuir: -mrc p15, 0, r0, c0, c0, 4 -mov pc, lr - - -; Memory map tables: - -section mem_tables - -kernel_table0: - dcd 0x00000402 ; Identity map first 1 MB - dcd 0x10000402 ; Map to peripheral space 1 MB - repeat 0x5FE - dcd 0 - endrepeat - - dcd 0x00000402 ; Alias to 0x0 - - repeat 0x9FF - dcd 0 - endrepeat - diff -r b77f3290ac79 -r a139da1f44f6 kernel/arch/qemu_vexpress/vexpressA9.c3 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/kernel/arch/qemu_vexpress/vexpressA9.c3 Fri May 16 12:30:10 2014 +0200 @@ -0,0 +1,32 @@ +module arch; +import io; + + +function void init() +{ + // putc(65) + io.print2("PFR0 = ", pfr0()); + io.print2("PFR1 = ", pfr1()); + io.print2("MMFR0 = ", mmfr0()); + + // This below is not compatible with all qemu versions: + // io.print2("MPUIR = ", arch.mpuir()); +} + +function void putc(int c) +{ + var int *UART0DR; + UART0DR = cast(0x109000); // UART0 DR register when remapped at 1MB + *UART0DR = c; +} + +function void halt() +{ + while(true) {} +} + +function int pfr0(); +function int pfr1(); +function int mmfr0(); +// function int mpuir(); + diff -r b77f3290ac79 -r a139da1f44f6 kernel/arch/qemu_vexpress/vexpressA9.mmap --- a/kernel/arch/qemu_vexpress/vexpressA9.mmap Fri May 16 10:12:16 2014 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,12 +0,0 @@ - -MEMORY image LOCATION=0x10000 SIZE=0x10000 { - SECTION(reset) - SECTION(code) - ALIGN(0x4000) - SECTION(mem_tables) -} - -MEMORY ram LOCATION=0x20000 SIZE=0x10000 { - SECTION(data) -} - diff -r b77f3290ac79 -r a139da1f44f6 kernel/arch/vexpressA9.c3 --- a/kernel/arch/vexpressA9.c3 Fri May 16 10:12:16 2014 +0200 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,32 +0,0 @@ -module arch; -import io; - - -function void init() -{ - // putc(65) - io.print2("PFR0 = ", pfr0()); - io.print2("PFR1 = ", pfr1()); - io.print2("MMFR0 = ", mmfr0()); - - // This below is not compatible with all qemu versions: - // io.print2("MPUIR = ", arch.mpuir()); -} - -function void putc(int c) -{ - var int *UART0DR; - UART0DR = cast(0x109000); // UART0 DR register when remapped at 1MB - *UART0DR = c; -} - -function void halt() -{ - while(true) {} -} - -function int pfr0(); -function int pfr1(); -function int mmfr0(); -// function int mpuir(); - diff -r b77f3290ac79 -r a139da1f44f6 kernel/build.xml --- a/kernel/build.xml Fri May 16 10:12:16 2014 +0200 +++ b/kernel/build.xml Fri May 16 12:30:10 2014 +0200 @@ -5,12 +5,12 @@ - - + + ', '<', '!=', '<=', '>=']: ta = self.genExprCode(expr.a) tb = self.genExprCode(expr.b) - if not self.equalTypes(expr.a.typ, expr.b.typ): + if not self.equal_types(expr.a.typ, expr.b.typ): raise SemanticError('Types unequal {} != {}' - .format(expr.a.typ, expr.b.typ), expr.loc) + .format(expr.a.typ, expr.b.typ), + expr.loc) self.emit(ir.CJump(ta, expr.op, tb, bbtrue, bbfalse)) else: raise SemanticError('non-bool: {}'.format(expr.op), expr.loc) @@ -205,7 +213,7 @@ raise NotImplementedError('Unknown cond {}'.format(expr)) # Check that the condition is a boolean value: - if not self.equalTypes(expr.typ, self.boolType): + if not self.equal_types(expr.typ, self.boolType): self.error('Condition must be boolean', expr.loc) def genExprCode(self, expr): @@ -216,8 +224,8 @@ if expr.op in ['+', '-', '*', '/', '<<', '>>', '|', '&']: ra = self.genExprCode(expr.a) rb = self.genExprCode(expr.b) - if self.equalTypes(expr.a.typ, self.intType) and \ - self.equalTypes(expr.b.typ, self.intType): + if self.equal_types(expr.a.typ, self.intType) and \ + self.equal_types(expr.b.typ, self.intType): expr.typ = expr.a.typ else: raise SemanticError('Can only add integers', expr.loc) @@ -268,7 +276,8 @@ expr.typ = basetype.fieldType(expr.field) else: raise SemanticError('{} does not contain field {}' - .format(basetype, expr.field), expr.loc) + .format(basetype, expr.field), + expr.loc) else: raise SemanticError('Cannot select {} of non-structure type {}' .format(expr.field, basetype), expr.loc) @@ -283,10 +292,13 @@ idx = self.genExprCode(expr.i) base_typ = self.the_type(expr.base.typ) if not isinstance(base_typ, ast.ArrayType): - raise SemanticError('Cannot index non-array type {}'.format(base_typ), expr.base.loc) + raise SemanticError('Cannot index non-array type {}' + .format(base_typ), + expr.base.loc) idx_type = self.the_type(expr.i.typ) - if not self.equalTypes(idx_type, self.intType): - raise SemanticError('Index must be int not {}'.format(idx_type), expr.i.loc) + if not self.equal_types(idx_type, self.intType): + raise SemanticError('Index must be int not {}' + .format(idx_type), expr.i.loc) assert type(base) is ir.Mem element_type = self.the_type(base_typ.element_type) element_size = self.size_of(element_type) @@ -296,14 +308,18 @@ return ir.Mem(ir.Add(base.e, ir.Mul(idx, ir.Const(element_size)))) elif type(expr) is ast.Literal: expr.lvalue = False - typemap = {int: 'int', float: 'double', bool: 'bool', str:'string'} + typemap = {int: 'int', + float: 'double', + bool: 'bool', + str: 'string'} if type(expr.val) in typemap: expr.typ = self.pkg.scope[typemap[type(expr.val)]] else: - raise SemanticError('Unknown literal type {}'.format(expr.val), expr.loc) + raise SemanticError('Unknown literal type {}' + .format(expr.val), expr.loc) # Construct correct const value: if type(expr.val) is str: - cval = struct.pack('next; + } + """ + self.expectOK(snippet) + + def testInfiniteStruct(self): + """ + Test if a struct can contain a field with itself as type? + This should not be possible! + """ + snippet = """ + module testnestedstruct; + + type struct { + int x; + list_t inner; + } list_t; + + """ + self.expectErrors(snippet, [0]) + + def testMutualStructs(self): + """ + Test if two structs can contain each other! + This should not be possible! + """ + snippet = """ + module testnestedstruct; + + type struct { + int x; + B other; + } A; + + type struct { + int x; + A other; + } B; + + """ + self.expectErrors(snippet, [0]) + def testComplexType(self): snippet = """ module testpointer;