# HG changeset patch # User Windel Bouwman # Date 1375806593 -7200 # Node ID b2f94b4951f117b54b28215b5d1cbdd29544624d # Parent ac603eb66b63bf8570e9da968666d5c0e9f33154 Nice-up diff -r ac603eb66b63 -r b2f94b4951f1 python/stm32.py --- a/python/stm32.py Mon Aug 05 20:41:25 2013 +0200 +++ b/python/stm32.py Tue Aug 06 18:29:53 2013 +0200 @@ -23,18 +23,18 @@ FLASH_F4_SR_BSY = 16 class Stm32F4(Device): - """ + """ Implementation of the specifics of the STM32F4xx device series. - """ - def __init__(self, iface): + """ + def __init__(self, iface): super().__init__(iface) self.logger = logging.getLogger('stm32') - def __str__(self): + def __str__(self): return 'STM32F4 device size=0x{1:X} id=0x{0:X}'.format(\ self.UID, self.FlashSize) - def calculate_F4_sector(self, address): + def calculate_F4_sector(self, address): sectorstarts = [] a = STM32_FLASH_BASE for sectorsize in self.sectorsizes: @@ -47,7 +47,7 @@ sec -= 1 # one back. return sec, self.sectorsizes[sec] - def calcSectors(self, address, size): + def calcSectors(self, address, size): off = 0 sectors = [] while off < size: @@ -55,27 +55,28 @@ sectors.append((sectornum, sectorsize)) off += sectorsize return sectors - # Device registers: - @property - def UID(self): + + # Device registers: + @property + def UID(self): uid_base = 0x1FFF7A10 uid1 = self.iface.read_debug32(uid_base) uid2 = self.iface.read_debug32(uid_base + 0x4) uid3 = self.iface.read_debug32(uid_base + 0x8) return (uid3 << 64) | (uid2 << 32) | uid1 - @property - def FlashSize(self): + @property + def FlashSize(self): f_id = self.iface.read_debug32(0x1FFF7A22) f_id = f_id >> 16 return f_id * 1024 - @property - def Running(self): + @property + def Running(self): return self.iface.Status == stlink.CORE_RUNNING - # flashing commands: - def writeFlash(self, address, content): + # flashing commands: + def writeFlash(self, address, content): flashsize = self.FlashSize pagesize = min(self.sectorsizes) @@ -114,21 +115,21 @@ # Use simple mem32 writes: self.iface.write_mem32(address + offset, chunk) offset += size - self.logger.info('.') - t2 = time.time() + self.logger.info('{}%'.format(offset*100/len(content))) self.logger.info('Done!') - self.logger.info('Speed: {0} bytes/second'.format(len(content)/(t2-t1))) self.lockFlash() # verfify program: self.verifyFlash(address, content) - def eraseFlashSector(self, sector): - self.waitFlashBusy() - self.unlockFlashIf() - self.writeFlashCrSnb(sector) - self.setFlashCrStart() - self.waitFlashBusy() - self.lockFlash() - def eraseFlash(self): + + def eraseFlashSector(self, sector): + self.waitFlashBusy() + self.unlockFlashIf() + self.writeFlashCrSnb(sector) + self.setFlashCrStart() + self.waitFlashBusy() + self.lockFlash() + + def eraseFlash(self): self.waitFlashBusy() self.unlockFlashIf() self.setFlashCrMer() @@ -137,16 +138,18 @@ self.clearFlashCrMer() self.lockFlash() - def verifyFlash(self, address, content): - device_content = self.readFlash(address, len(content)) - ok = content == device_content - self.logger.info('Verify: {}'.format(ok)) + def verifyFlash(self, address, content): + device_content = self.readFlash(address, len(content)) + ok = content == device_content + if ok: + self.logger.info('Verify: OK') + else: + self.logger.warning('Verify: Mismatch') - def readFlash(self, address, size): + def readFlash(self, address, size): self.logger.info('Reading {1} bytes from 0x{0:X}'.format(address, size)) offset = 0 tmp_size = 0x1800 - t1 = time.time() image = bytes() while offset < size: # Correct for last page: @@ -162,68 +165,73 @@ image += mem[:tmp_size] # indicate progress: - self.logger.info('.') + self.logger.info('{}%'.format(100*len(image) / size)) # increase for next piece: offset += tmp_size - t2 = time.time() assert size == len(image) self.logger.info('Done!') - self.logger.info('Speed: {0} bytes/second'.format(size/(t2-t1))) return image - def waitFlashBusy(self): + def waitFlashBusy(self): """ block until flash operation completes. """ while self.isFlashBusy(): time.sleep(0.01) - def isFlashLocked(self): - cr = self.readFlashCr() - mask = 1 << FLASH_F4_CR_LOCK - return cr & mask == mask - def unlockFlashIf(self): + + def isFlashLocked(self): + mask = 1 << FLASH_F4_CR_LOCK + return self.Cr & mask == mask + + def unlockFlashIf(self): FLASH_KEY1, FLASH_KEY2 = 0x45670123, 0xcdef89ab if self.isFlashLocked(): self.iface.write_debug32(FLASH_F4_KEYR, FLASH_KEY1) self.iface.write_debug32(FLASH_F4_KEYR, FLASH_KEY2) if self.isFlashLocked(): raise STLinkException('Failed to unlock') - def lockFlash(self): - x = self.readFlashCr() | (1 << FLASH_F4_CR_LOCK) - self.writeFlashCr(x) - def readFlashSr(self): - return self.iface.read_debug32(FLASH_F4_SR) - def readFlashCr(self): - return self.iface.read_debug32(FLASH_F4_CR) - def writeFlashCr(self, x): - self.iface.write_debug32(FLASH_F4_CR, x) - def writeFlashCrSnb(self, sector): - x = self.readFlashCr() + + def lockFlash(self): + self.Cr = self.Cr | (1 << FLASH_F4_CR_LOCK) + + def readFlashSr(self): + return self.iface.read_debug32(FLASH_F4_SR) + + def readFlashCr(self): + return self.iface.read_debug32(FLASH_F4_CR) + + def writeFlashCr(self, x): + self.iface.write_debug32(FLASH_F4_CR, x) + + Cr = property(readFlashCr, writeFlashCr) + + def writeFlashCrSnb(self, sector): + x = self.Cr x &= ~FLASH_F4_CR_SNB_MASK x |= sector << FLASH_F4_CR_SNB x |= 1 << FLASH_F4_CR_SER - self.writeFlashCr(x) - def setFlashCrMer(self): - x = self.readFlashCr() - x |= 1 << FLASH_CR_MER - self.writeFlashCr(x) - def setFlashCrPg(self): - x = self.readFlashCr() - x |= 1 << FLASH_CR_PG - self.writeFlashCr(x) - def writeFlashCrPsiz(self, n): - x = self.readFlashCr() - x &= (0x3 << 8) - x |= n << 8 - self.writeFlashCr(x) - def clearFlashCrMer(self): - x = self.readFlashCr() - x &= ~(1 << FLASH_CR_MER) - self.writeFlashCr(x) - def setFlashCrStart(self): - x = self.readFlashCr() - x |= 1 << FLASH_F4_CR_START - self.writeFlashCr(x) - def isFlashBusy(self): + self.Cr = x + + def setFlashCrMer(self): + self.Cr = self.Cr | (1 << FLASH_CR_MER) + + def setFlashCrPg(self): + self.Cr = self.Cr | (1 << FLASH_CR_PG) + + def writeFlashCrPsiz(self, n): + x = self.Cr + x &= (0x3 << 8) + x |= n << 8 + self.Cr = x + + def clearFlashCrMer(self): + x = self.Cr + x &= ~(1 << FLASH_CR_MER) + self.Cr = x + + def setFlashCrStart(self): + self.Cr = self.Cr | (1 << FLASH_F4_CR_START) + + def isFlashBusy(self): mask = 1 << FLASH_F4_SR_BSY sr = self.readFlashSr() # Check for error bits: