# HG changeset patch
# User Windel Bouwman
# Date 1385919443 -3600
# Node ID 674789d9ff37d7757fcd8d66ec23a87ce86a7a18
# Parent  f7c3d38d0a47b3b359ff736845762c11312f4877
Added a doc

diff -r f7c3d38d0a47 -r 674789d9ff37 doc/compiler.rst
--- a/doc/compiler.rst	Sun Dec 01 17:45:22 2013 +0100
+++ b/doc/compiler.rst	Sun Dec 01 18:37:23 2013 +0100
@@ -35,21 +35,14 @@
    30 -> 40
    }
 
+
 IR-code
 -------
-The IR-code is implemented in the ir package.
-
-.. autoclass:: ir.Module
-
-.. autoclass:: ir.Function
+The intermediate representation (IR) of a program de-couples the front end
+from the backend of the compiler.
 
-.. autoclass:: ir.Block
-
-.. autoclass:: ir.Statement
+See ir for details about all the available instructions.
 
-.. autoclass:: ir.Expression
-
-.. # .. inheritance-diagram:: ir.Statement
 
 C3 Front-end
 ------------
@@ -60,21 +53,17 @@
 .. graphviz::
   
    digraph c3 {
-   rankdir="LR"
    1 [label="source text"]
    10 [label="lexer" ]
    20 [label="parser" ]
    30 [label="semantic checks" ]
    40 [label="code generation"]
    99 [label="IR-code object"]
-   1 -> 20
+   1 -> 10
+   10 -> 20
    20 -> 30
-   30 -> 40
+   30 -> 40 [label="AST tree"]
    40 -> 99
-   subgraph rel1 {
-    edge [dir=none]
-    10 -> 20
-   }
    }
 
 .. autoclass:: c3.Builder
diff -r f7c3d38d0a47 -r 674789d9ff37 doc/index.rst
--- a/doc/index.rst	Sun Dec 01 17:45:22 2013 +0100
+++ b/doc/index.rst	Sun Dec 01 18:37:23 2013 +0100
@@ -14,6 +14,7 @@
    readme_link
    design
    compiler
+   ir
 
 
 
diff -r f7c3d38d0a47 -r 674789d9ff37 doc/ir.rst
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/doc/ir.rst	Sun Dec 01 18:37:23 2013 +0100
@@ -0,0 +1,21 @@
+
+
+IR-code
+=======
+
+Front ends generate this IR-code. Backends transform it into machine code.
+
+The IR-code is implemented in the ir package.
+
+.. autoclass:: ir.Module
+
+.. autoclass:: ir.Function
+
+.. autoclass:: ir.Block
+
+.. autoclass:: ir.Statement
+
+.. autoclass:: ir.Expression
+
+.. # .. inheritance-diagram:: ir.Statement
+
diff -r f7c3d38d0a47 -r 674789d9ff37 python/irmach.py
--- a/python/irmach.py	Sun Dec 01 17:45:22 2013 +0100
+++ b/python/irmach.py	Sun Dec 01 18:37:23 2013 +0100
@@ -7,8 +7,7 @@
   Instructions are selected and scheduled at this stage.
 """
 
-import ir
-import target
+from target import Instruction
 
 
 class Frame:
@@ -27,7 +26,7 @@
 
     def lower_to(self, outs):
         for im in self.instructions:
-            if isinstance(im.assem, target.Instruction):
+            if isinstance(im.assem, Instruction):
                 outs.emit(im.assem)
             else:
                 outs.emit(im.assem.fromim(im))
@@ -39,14 +38,13 @@
         abstraction of machine instructions.
     """
     def __init__(self, cls, ops=(), src=(), dst=(), jumps=(), others=(), ismove=False):
-        assert type(cls) is type or isinstance(cls, target.Instruction)
+        assert type(cls) is type or isinstance(cls, Instruction)
         self.assem = cls
         self.ops = tuple(ops)
         self.src = tuple(src)
         self.dst = tuple(dst)
         self.jumps = tuple(jumps)
         self.others = tuple(others)
-        c = lambda s: tuple(map(type, s)) == (ir.Temp, )
         self.ismove = ismove
 
     def __repr__(self):
@@ -67,3 +65,6 @@
             p = '%l{}'.format(i)
             x = x.replace(p, str(j))
         return x
+
+
+makeIns = AbstractInstruction
diff -r f7c3d38d0a47 -r 674789d9ff37 readme.rst
--- a/readme.rst	Sun Dec 01 17:45:22 2013 +0100
+++ b/readme.rst	Sun Dec 01 18:37:23 2013 +0100
@@ -53,4 +53,6 @@
 .. image:: https://www.ohloh.net/p/lcfos/widgets/project_thin_badge.gif
 
 
+https://drone.io/bitbucket.org/windel/lcfos
 
+
diff -r f7c3d38d0a47 -r 674789d9ff37 test/testregalloc.py
--- a/test/testregalloc.py	Sun Dec 01 17:45:22 2013 +0100
+++ b/test/testregalloc.py	Sun Dec 01 18:37:23 2013 +0100
@@ -1,7 +1,7 @@
 import unittest
 import os
 import sys
-from irmach import AbstractInstruction as makeIns, Frame
+from irmach import makeIns, Frame
 from codegen.registerallocator import RegisterAllocator
 import ir
 from target import Nop