# HG changeset patch
# User Windel Bouwman
# Date 1394292543 -3600
# Node ID 2b02bd286fe9e46151db3d7a415a939bd9e3c769
# Parent  13a6e73b448f3fe92910f9c24b7adb6881eee0a8
Fixed A9 hello worle

diff -r 13a6e73b448f -r 2b02bd286fe9 examples/qemu_a9_hello/make.sh
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/examples/qemu_a9_hello/make.sh	Sat Mar 08 16:29:03 2014 +0100
@@ -0,0 +1,4 @@
+
+../../python/zcc.py recipe recipe.yaml
+
+
diff -r 13a6e73b448f -r 2b02bd286fe9 examples/qemu_a9_hello/qemutst.sh
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/examples/qemu_a9_hello/qemutst.sh	Sat Mar 08 16:29:03 2014 +0100
@@ -0,0 +1,7 @@
+#!/usr/bin/env bash
+
+echo "Trying to run versatilePB board"
+
+qemu-system-arm -M realview-pb-a8 -m 128M -kernel hello.bin -serial stdio
+
+
diff -r 13a6e73b448f -r 2b02bd286fe9 python/ppci/linker.py
--- a/python/ppci/linker.py	Sat Mar 08 16:16:41 2014 +0100
+++ b/python/ppci/linker.py	Sat Mar 08 16:29:03 2014 +0100
@@ -89,6 +89,20 @@
     section.data[reloc.offset+0] = rel24 & 0xFF
 
 
+@reloc('ldr_imm12')
+def apply_ldr_imm12(reloc, sym, section, reloc_value):
+    assert sym.value % 4 == 0
+    assert reloc_value % 4 == 0
+    offset = (sym.value - (reloc_value + 8))
+    U = 1
+    if offset < 0:
+        offset = -offset
+        U = 0
+    assert offset < 4096
+    section.data[reloc.offset+2] |= (U << 7) #(rel24 >> 16) & 0xFF
+    section.data[reloc.offset+1] |= (offset >> 8) & 0xF
+    section.data[reloc.offset+0] = offset & 0xFF
+
 class Linker:
     """ Merges the sections of several object files and 
         performs relocation """
diff -r 13a6e73b448f -r 2b02bd286fe9 python/ppci/target/arm/__init__.py
--- a/python/ppci/target/arm/__init__.py	Sat Mar 08 16:16:41 2014 +0100
+++ b/python/ppci/target/arm/__init__.py	Sat Mar 08 16:29:03 2014 +0100
@@ -115,6 +115,9 @@
         self.add_instruction(['ldr', 'reg', ',', '[', 'reg', ',', 'imm8', ']'],
             lambda rhs: Ldr(rhs[1], rhs[4], rhs[6]))
 
+        self.add_instruction(['ldr', 'reg', ',', 'ID'],
+            lambda rhs: Ldr(rhs[1], rhs[3].val))
+
         self.add_keyword('str')
         self.add_instruction(['str', 'reg', ',', '[', 'reg', ',', 'imm8', ']'],
             lambda rhs: Str(rhs[1], rhs[4], rhs[6]))
diff -r 13a6e73b448f -r 2b02bd286fe9 python/ppci/target/arm/instructions.py
--- a/python/ppci/target/arm/instructions.py	Sat Mar 08 16:16:41 2014 +0100
+++ b/python/ppci/target/arm/instructions.py	Sat Mar 08 16:29:03 2014 +0100
@@ -34,6 +34,9 @@
         self.token[0:32] = self.v
         return self.token.encode()
 
+    def __repr__(self):
+        return 'DCD {}'.format(hex(self.v))
+
 
 def Mov(*args):
     if len(args) == 2:
@@ -84,6 +87,9 @@
         self.token.cond = AL
         return self.token.encode()
 
+    def __repr__(self):
+        return 'MOV {}, {}'.format(self.rd, self.rm)
+
 
 def Add(*args):
     if len(args) == 3 and isinstance(args[0], ArmRegister) and \
@@ -206,6 +212,10 @@
     def relocations(self):
         return [(self.target, 'b_imm24')]
 
+    def __repr__(self):
+        mnemonic = self.__class__.__name__
+        return '{} {}'.format(mnemonic, self.target)
+
 
 EQ, NE, CS, CC, MI, PL, VS, VC, HI, LS, GE, LT, GT, LE, AL = range(15)
 
@@ -255,6 +265,10 @@
         self.token[0:16] = reg_list_to_mask(self.reg_list)
         return self.token.encode()
 
+    def __repr__(self):
+        return 'PUSH {}'.format(self.reg_list)
+
+
 class Pop(ArmInstruction):
     def __init__(self, register_set):
         super().__init__()
@@ -266,14 +280,23 @@
         self.token[0:16] = reg_list_to_mask(self.reg_list)
         return self.token.encode()
 
+    def __repr__(self):
+        return 'POP {}'.format(self.reg_list)
+
 
 def Ldr(*args):
-    if len(args) == 3 and isinstance(args[1], ArmRegister):
-        return Ldr1(*args)
-    elif len(args) == 2 and isinstance(args[1], ArmRegister):
-        return Ldr1(args[0], args[1], 0)
+    """ Convenience function that creates the correct instruction """
+    if len(args) == 3:
+        if isinstance(args[1], ArmRegister):
+            return Ldr1(*args)
+    elif len(args) == 2:
+        if isinstance(args[1], ArmRegister):
+            return Ldr1(args[0], args[1], 0)
+        elif isinstance(args[1], str):
+            return Ldr3(*args)
     raise Exception()
 
+
 def Str(*args):
     if len(args) == 3 and isinstance(args[1], ArmRegister):
         return Str1(*args)
@@ -304,20 +327,42 @@
             self.token[0:12] = -self.offset
         return self.token.encode()
 
+    def __repr__(self):
+        return '{} {}, [{}, {}]'.format(self.mnemonic, self.rt, self.rn, 
+                hex(self.offset))
 
 class Str1(LdrStrBase):
     opcode = 0b010
     bit20 = 0
+    mnemonic = 'STR'
 
 
 class Ldr1(LdrStrBase):
     opcode = 0b010
     bit20 = 1
+    mnemonic = 'LDR'
 
 
 class Ldr3(ArmInstruction):
-    """ Load PC relative constant value """
+    """ Load PC relative constant value
+        LDR rt, label
+        encoding A1
+    """
     def __init__(self, rt, label):
+        super().__init__()
         self.rt = rt
         self.label = label
 
+    def __repr__(self):
+        return 'LDR {}, {}'.format(self.rt, self.label)
+
+    def relocations(self):
+        return [(self.label, 'ldr_imm12')]
+
+    def encode(self):
+        self.token.cond = AL
+        self.token[0:12] = 0  # Filled by linker
+        self.token[12:16] = self.rt.num
+        self.token[16:23] = 0b0011111
+        self.token[24:28] = 0b0101
+        return self.token.encode()