view experiments/qemu_vexpress_a9/startup.s @ 396:fb3c1f029b30

Added baselexer into c3 lexer
author Windel Bouwman
date Tue, 27 May 2014 22:19:32 +0200
parents 34ac19044b8a
children b1daa462ee17
line wrap: on
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.section .init

.global _Reset;
_Reset:

_start:
 LDR sp, =stack_top

 ldr r2, =0x10009000

 mov r1, #'1'
 str r1, [r2]

// Load TTBR0 and TTBR1
 ldr r0, =kernel_table0
 mcr p15, 0, r0, c2, c0, 1
 mcr p15, 0, r0, c2, c0, 0

 // Domain 0:
mov r0, #3
mcr p15, 0, r0, c3, c0, 0

 # ; Enable paging:
mrc p15, 0, r0, c1, c0, 0
orr r0, r0, #1
mcr p15, 0, r0, c1, c0, 0

// Change uart DR pointer (now located at 0x109000:
 ldr r2, =0x109000
 mov r1, #'2'
 str r1, [r2]

 BL start
 B .

.section .padata

/*
 Maybe the kernel is loaded at 0x60000000, so we need to map that to first 
 megabyte also...
*/

kernel_table0:
 .long 0x00000000 + 0x402 // 0x00000000 # ; Identity map first 1 MB
 .long 0x10000000 + 0x402 // 0x00100000 # ; second mb mapping to peripherals

 .rept 0x600 - 2
  .long 0x0
 .endr
 .long 0x00000402 // 0x60000000 maps 1 MB to first MB
 .rept 0x1000 - 0x601
  .long 0x0
 .endr