import struct
from .basetarget import Register, Instruction, Target, Label, LabelRef
from .basetarget import Imm32, Imm8, Imm7, Imm3
from .arminstructions import allins, Reg8Op, ArmRegister
from .arminstructions import Dcd, B
from .arminstructions import R0, R1, R2, R3, R4, R5, R6, R7, LR, PC, SP


""" ARM target description. """

# TODO: encode this in DSL (domain specific language)
# TBD: is this required?
# TODO: make a difference between armv7 and armv5?


class ArmTarget(Target):
    def __init__(self):
        super().__init__('arm')
        for i in allins:
            self.addInstruction(i)
            # TODO: fix this nicer?
            #setattr(self, i.__name__, i)
        self.check()

    def startCode(self, outs):
        """ Emit some startup code in the output stream """
        outs.selectSection('code')
        # assembly glue to make it work:
        # TODO: this must be in source code, not in compiler
        outs.emit(Dcd(Imm32(0x20000678)))   # initial SP
        outs.emit(Dcd(Imm32(0x08000009)))   # reset vector
        outs.emit(B(LabelRef('main')))