from target import Register, Instruction, Target

class x86Register(Register):
   def __init__(self, name):
      self.name = name

class REG16(x86Register):
   pass

def addRegs(cls, names):
   for name in names:
      r = cls(name)
      globals()[name] = r

addRegs(REG16, ['ax', 'bx', 'cx'])

regs = """
ax; reg16
"""

class MO:
   def __init__(self):
      pass

instrs = """
add; 0x0; mem8/reg8; reg8
"""

# machine op table:
mot = []

for i in instrs.split('\n'):
   i = i.strip()
   if i:
      print('INS:', i)
      mnemonic, opcode, op1, op2 = [a.strip() for a in i.split(';')]
      print(op1.split('/'), op2.split('/'))


print(mot)

# Test first with these 3 instructions:
"""
mov reg64, reg64 : opcode=0x89
xor reg64, reg64 : opcode=0x31
inc reg64 : opcode=0xff
"""

class x86Machine:
   def __init__(self):
      self.table = []
      self.table.append((0x0, 'add', 'reg8/mem8, reg8'))
      self.table.append((0x1, 'add', 'reg16/mem16/reg32/mem32, reg16/reg32'))
      self.table.append((0x2, 'add', 'reg8, reg8/mem8'))
   def forMnemonic(self, m):
      return [i for i in self.table if i[1] == m]
   def emit(self, m, ops):
      print(m, ops)
      ops = self.forMnemonic(m)
      print(ops)


if __name__ == '__main__':
   m = x86Machine()
   m.emit('add', [ax, cx])
   m.emit('mov', [bx, 1337])