Mercurial > lcfOS
view test/testasm.py @ 380:67a584582aee
Small change to hexfile
author | Windel Bouwman |
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date | Fri, 18 Apr 2014 13:08:45 +0200 |
parents | 442fb043d149 |
children | 6df89163e114 |
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#!/usr/bin/python import unittest from ppci import CompilerError from ppci.assembler import tokenize, Assembler, Lexer from ppci.objectfile import ObjectFile from ppci.linker import Linker from ppci.outstream import BinaryOutputStream from ppci.target.basetarget import Label class AssemblerLexingCase(unittest.TestCase): """ Tests the assemblers lexer """ def testLex0(self): """ Check if the lexer is OK """ asmline, toks = 'mov rax, rbx ', ['ID', 'ID', ',', 'ID', 'EOF'] self.assertSequenceEqual([tok.typ for tok in tokenize(asmline, [])], toks) def testLex1(self): """ Test if lexer correctly maps some tokens """ asmline, toks = 'lab1: mov rax, rbx ', ['ID', ':', 'ID', 'ID', ',', 'ID', 'EOF'] self.assertSequenceEqual([tok.typ for tok in tokenize(asmline, [])], toks) def testLex2(self): """ Test if lexer correctly maps some tokens """ asmline, toks = 'mov 3.13 0xC 13', ['ID', 'REAL', 'val5', 'val5', 'EOF'] self.assertSequenceEqual([tok.typ for tok in tokenize(asmline, [])], toks) def testLex3(self): """ Test if lexer fails on a token that is invalid """ asmline = '0z4: mov rax, rbx $ ' with self.assertRaises(CompilerError): list(tokenize(asmline, [])) class AssemblerParsingTestCase(unittest.TestCase): """ Tests the assembler parts """ def setUp(self): self.skipTest('refactoring asm parser') self.parser = asmParser self.stack = [] def emit(self, x): self.stack.append(x) def parse_line(self, line): self.parser.parse(Lexer(line), self.emit) def testParse(self): asmline = 'lab1: mov rax, rbx' self.parse_line(asmline) def expectTree(self, asmline, stack): self.parse_line(asmline) self.assertSequenceEqual(stack, self.stack) def testParse2(self): asmline = 'a: mov rax, [rbx + 2]' output = [] output.append(ALabel('a')) output.append(AInstruction('mov', [ASymbol('rax'), AUnop('[]', ASymbol('rbx') + ANumber(2))])) self.expectTree(asmline, output) def testParse3(self): # A label must be optional: asmline = 'mov rax, 1' output = [AInstruction('mov', [ASymbol('rax'), ANumber(1)])] self.expectTree(asmline, output) def testParse4(self): # Test 3 operands: asmline = 'add rax, [4*rbx + 22], rcx' ops = [] ops.append(ASymbol('rax')) ops.append(AUnop('[]', ANumber(4) * ASymbol('rbx') + ANumber(22))) ops.append(ASymbol('rcx')) output = [AInstruction('add', ops)] self.expectTree(asmline, output) def testParse5(self): # An instruction must be optional: asmline = 'lab1:' output = [] output.append(ALabel('lab1')) self.expectTree(asmline, output) def testParse6(self): # A line can be empty self.parse_line('') class OustreamTestCase(unittest.TestCase): def test1(self): obj = ObjectFile() o = BinaryOutputStream(obj) o.select_section('.text') o.emit(Label('a')) self.assertSequenceEqual(bytes(), obj.get_section('.text').data) class AsmTestCaseBase(unittest.TestCase): """ Base testcase for assembly """ def feed(self, line): self.a.assemble(line, self.ostream) def check(self, hexstr): l = Linker() self.obj = l.link([self.obj]) data = bytes(self.obj.get_section('.text').data) self.assertSequenceEqual(bytes.fromhex(hexstr), data) if __name__ == '__main__': unittest.main()