Mercurial > lcfOS
view python/x86.py @ 170:4348da5ca307
Cleanup of ir dir
author | Windel Bouwman |
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date | Fri, 29 Mar 2013 17:33:17 +0100 |
parents | 10330be89bc2 |
children | 3eb9b9e2958d |
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import ppci import ir class AsmLabel: def __init__(self, lab): self.lab = lab def __repr__(self): return '{0}:'.format(self.lab) class Op: def __init__(self, op, a, b): self.op = op self.a = a self.b = b def __repr__(self): return '{0} {1}, {2}'.format(self.op, self.a, self.b) class X86CodeGen: def __init__(self, diag): self.diag = diag self.regs = ['rax', 'rbx', 'rcx', 'rdx'] def emit(self, i): self.asm.append(i) def allocateReg(self, typ): return 'ax' def deallocateReg(self, r): pass def genBin(self, i): self.asm = [] self.genModule(i) def genModule(self, m): for g in m.Globals: self.emit(AsmLabel(g.name)) # Ignore types for now .. self.emit('dw 0') for f in m.Functions: self.genFunction(f) def genFunction(self, f): self.emit('global {0}'.format(f.name)) self.emit(AsmLabel(f.name)) for bb in f.BasicBlocks: self.genBB(bb) def genBB(self, bb): for i in bb.Instructions: self.genIns(i) def genIns(self, i): if type(i) is ir.BinaryOperator: if i.operation == 'fadd': r = 'rax' self.emit(Op('add', r, '11')) elif type(i) is ir.LoadInstruction: r = 'rbx' self.emit(Op('mov', r, '{0}'.format(i.value))) elif type(i) is ir.RetInstruction: self.emit('ret') elif type(i) is ir.CallInstruction: self.emit('call') else: print('Unknown ins', i)