Mercurial > lcfOS
view doc/compiler.rst @ 302:2ef2247f8dda
Added screenshot application
author | Windel Bouwman |
---|---|
date | Fri, 06 Dec 2013 12:09:35 +0100 |
parents | 6753763d3bec |
children | fa99f36fabb5 |
line wrap: on
line source
Compiler ======== This chapter describes the design of the compiler. The compiler consists a frontend, mid-end and back-end. The frontend deals with source file parsing and semantics checking. The mid-end performs optimizations. This is optional. The back-end generates machine code. The front-end produces intermediate code. This is a simple representation of the source. The back-end can accept this kind of representation. .. graphviz:: digraph x { rankdir="LR" 1 [label="c3 source file"] 10 [label="c3 front end" ] 11 [label="language X front end" ] 20 [label="mid end" ] 30 [label="back end for X86" ] 31 [label="back end for ARM" ] 40 [label="object file"] 1 -> 10 10 -> 20 [label="IR-code"] 11 -> 20 [label="IR-code"] 20 -> 30 [label="IR-code"] 20 -> 31 [label="IR-code"] 30 -> 40 } IR-code ------- The intermediate representation (IR) of a program de-couples the front end from the backend of the compiler. See ir for details about all the available instructions. C3 Front-end ------------ For the front-end a recursive descent parser is created for the c3 language. This is a subset of the C language with some additional features. .. graphviz:: digraph c3 { rankdir="LR" 1 [label="source text"] 10 [label="lexer" ] 20 [label="parser" ] 30 [label="semantic checks" ] 40 [label="code generation"] 99 [label="IR-code object"] 1 -> 10 10 -> 20 20 -> 30 30 -> 40 [label="AST tree"] 40 -> 99 } .. autoclass:: ppci.c3.Builder .. autoclass:: ppci.c3.Parser .. autoclass:: ppci.c3.CodeGenerator Back-end -------- The back-end is more complicated. There are several steps to be taken here. 1. Instruction selection 2. register allocation 3. Peep hole optimization? 4. real code generation .. automodule:: codegen :members: Instruction selection ~~~~~~~~~~~~~~~~~~~~~ The instruction selection phase takes care of scheduling and instruction selection. The output of this phase is a one frame per function with a flat list of abstract machine instructions. .. autoclass:: irmach.Frame .. autoclass:: irmach.AbstractInstruction