--- a/python/target/armregisters.py	Sun Feb 23 16:24:01 2014 +0100
+++ b/python/target/armregisters.py	Fri Feb 28 18:07:14 2014 +0100
@@ -17,6 +17,17 @@
 class Reg16Op(ArmRegister):
     pass
 
+def get_register(n):
+    for x in registers:
+        if x.num == n:
+            return x
+    raise Exception()
+
+def register_range(a, b):
+    """ Return set of registers from a to b """
+    assert a.num < b.num
+    return {get_register(n) for n in range(a.num, b.num + 1)}
+
 
 R0 = Reg8Op(0, 'r0')
 R1 = Reg8Op(1, 'r1')
@@ -26,11 +37,11 @@
 R5 = Reg8Op(5, 'r5')
 R6 = Reg8Op(6, 'r6')
 R7 = Reg8Op(7, 'r7')
-R7 = Reg8Op(8, 'r8')
-R7 = Reg8Op(9, 'r9')
-R7 = Reg8Op(10, 'r10')
-R7 = Reg8Op(11, 'r11')
-R7 = Reg8Op(12, 'r12')
+R8 = Reg8Op(8, 'r8')
+R9 = Reg8Op(9, 'r9')
+R10 = Reg8Op(10, 'r10')
+R11 = Reg8Op(11, 'r11')
+R12 = Reg8Op(12, 'r12')
 
 # Other registers:
 # TODO