diff python/codegenarm.py @ 272:e64bae57cda8

refactor ir
author Windel Bouwman
date Sat, 31 Aug 2013 17:58:54 +0200
parents cdc76d183bcc
children ea93e0a7a31e
line wrap: on
line diff
--- a/python/codegenarm.py	Tue Aug 20 18:56:02 2013 +0200
+++ b/python/codegenarm.py	Sat Aug 31 17:58:54 2013 +0200
@@ -6,7 +6,7 @@
 import flowgraph
 import registerallocator
 from instructionselector import InstructionSelector
-
+import irmach
 
 class ArmInstructionSelector(InstructionSelector):
     """ Instruction selector for the arm architecture """
@@ -58,8 +58,16 @@
             return d
         elif isinstance(e, ir.Temp):
             return self.getTempReg(e)
+        elif isinstance(e, ir.Call):
+            args = [self.munchExpr(a) for a in e.arguments]
+            self.emit('add sp, sp, 22')
+            # TODO: save frame
+            for a in args:
+                self.emit('push %s0', src=[a])
+            self.emit('bl {}'.format(e.f.name))
+            self.emit('sub sp, sp, 22')
         else:
-            raise NotImplementedError('--> {}'.format(e))
+            raise NotImplementedError('Expr --> {}'.format(e))
 
     def munchStm(self, s):
         if isinstance(s, ir.Move) and isinstance(s.dst, ir.Mem):
@@ -70,9 +78,6 @@
             val = self.munchExpr(s.src)
             dreg = self.getTempReg(s.dst)
             self.emit('mov %d0, %s0', dst=[dreg], src=[val])
-        elif isinstance(s, ir.Return):
-            #etgt = self.targets[
-            self.emit('jmp exit', jumps=[])
         elif isinstance(s, ir.Jump):
             tgt = self.targets[s.target]
             self.emit('jmp {}'.format(s), jumps=[tgt])
@@ -102,12 +107,19 @@
     def useUnused(self, inslist):
         # Use unused temporaries at the end of the list
         defTemps = []
-        for d in (i.dst for i in inslist):
-            print(d)
-            defTemps.append(d)
-        useTemps = [d for d in ([i.src] for i in inslist)]
-        print(defTemps)
-        print(useTemps)
+        useTemps = []
+        for i in inslist:
+            for d in iter(i.dst):
+                defTemps.append(d)
+            for s in iter(i.src):
+                useTemps.append(s)
+        defTemps = set(defTemps)
+        useTemps = set(useTemps)
+        unUsed = defTemps - useTemps
+        #print('Unused:', unUsed)
+        for uu in unUsed:
+            inslist.append(irmach.AbstractInstruction('use %s0', src=[uu]))
+        #print(useTemps)
 
     def generate(self, ircode, cfg_file=None, ig_file=None):
         ir2 = self.ins_sel.munchProgram(ircode)
@@ -122,11 +134,13 @@
         regs = ['r0', 'r1', 'r2', 'r3', 'r4', 'r5', 'r6', 'r7']
         ra = registerallocator.RegisterAllocator()
         regMap = ra.registerAllocate(ig, regs)
-        print(regMap)
+        #print(regMap)
+        # Use allocated registers:
         for i in ir2:
             i.src = tuple(regMap[t] for t in i.src)
             i.dst = tuple(regMap[t] for t in i.dst)
-            print(i)
+            #print(i)
+        return ir2