--- a/python/codegenarm.py	Sun Aug 18 17:43:18 2013 +0200
+++ b/python/codegenarm.py	Mon Aug 19 21:14:28 2013 +0200
@@ -3,7 +3,6 @@
 from target import Label, Comment, Alignment, LabelRef, Imm32, DebugInfo
 import cortexm3 as arm
 from ppci import CompilerError
-import graph
 import flowgraph
 import registerallocator
 from instructionselector import InstructionSelector
@@ -100,9 +99,20 @@
         self.outs.getSection('code').address = 0x08000000
         self.outs.getSection('data').address = 0x20000000
 
+    def useUnused(self, inslist):
+        # Use unused temporaries at the end of the list
+        defTemps = []
+        for d in (i.dst for i in inslist):
+            print(d)
+            defTemps.append(d)
+        useTemps = [d for d in ([i.src] for i in inslist)]
+        print(defTemps)
+        print(useTemps)
+
     def generate(self, ircode, cfg_file=None, ig_file=None):
-        x = self.ins_sel.munchProgram(ircode)
-        cfg = flowgraph.FlowGraph(x)
+        ir2 = self.ins_sel.munchProgram(ircode)
+        self.useUnused(ir2)
+        cfg = flowgraph.FlowGraph(ir2)
         if cfg_file:
             cfg.to_dot(cfg_file)
         ig = registerallocator.InterferenceGraph(cfg)
@@ -111,6 +121,12 @@
 
         regs = ['r0', 'r1', 'r2', 'r3', 'r4', 'r5', 'r6', 'r7']
         ra = registerallocator.RegisterAllocator()
-        ra.registerAllocate(ig, regs)
+        regMap = ra.registerAllocate(ig, regs)
+        print(regMap)
+        for i in ir2:
+            i.src = tuple(regMap[t] for t in i.src)
+            i.dst = tuple(regMap[t] for t in i.dst)
+            print(i)
 
 
+