--- a/python/testasm.py	Sat Jun 01 13:11:22 2013 +0200
+++ b/python/testasm.py	Fri Jun 07 18:59:57 2013 +0200
@@ -1,8 +1,9 @@
 #!/usr/bin/python
 
-import unittest
+import unittest, cProfile
 import ppci
 from asm import AInstruction, ABinop, AUnop, ASymbol, ALabel, ANumber, tokenize, Assembler
+import msp430
 
 class AssemblerLexingCase(unittest.TestCase):
     """ Tests the assemblers lexer """
@@ -32,56 +33,50 @@
     """ 
         Tests the assembler parts
     """
+    def setUp(self):
+        self.a = Assembler()
 
     def testParse(self):
         asmline = 'lab1: mov rax, rbx'
-        a = Assembler()
-        a.parse_line(asmline)
+        self.a.parse_line(asmline)
 
     def testParse2(self):
         asmline = 'a: mov rax, [rbx + 2]'
-        a = Assembler()
-        a.parse_line(asmline)
+        self.a.parse_line(asmline)
         output = []
         output.append(ALabel('a'))
         output.append(AInstruction('mov', [ASymbol('rax'), AUnop('[]', ASymbol('rbx') + ANumber(2))]))
-        self.assertSequenceEqual(output, a.output)
+        self.assertSequenceEqual(output, self.a.output)
 
     def testParse3(self):
         # A label must be optional:
         asmline = 'mov rax, 1'
-        a = Assembler()
-        a.parse_line(asmline)
-        output = []
-        output.append(AInstruction('mov', [ASymbol('rax'), ANumber(1)]))
-        self.assertSequenceEqual(output, a.output)
+        self.a.parse_line(asmline)
+        output = [AInstruction('mov', [ASymbol('rax'), ANumber(1)])]
+        self.assertSequenceEqual(output, self.a.output)
 
     def testParse4(self):
         # Test 3 operands:
         asmline = 'add rax, [4*rbx + 22], rcx'
-        a = Assembler()
-        a.parse_line(asmline)
-        output = []
+        self.a.parse_line(asmline)
         ops = []
         ops.append(ASymbol('rax'))
         ops.append(AUnop('[]', ANumber(4) * ASymbol('rbx') + ANumber(22)))
         ops.append(ASymbol('rcx'))
-        output.append(AInstruction('add', ops))
-        self.assertSequenceEqual(output, a.output)
+        output = [AInstruction('add', ops)]
+        self.assertSequenceEqual(output, self.a.output)
 
     def testParse5(self):
         # An instruction must be optional:
         asmline = 'lab1:'
-        a = Assembler()
-        a.parse_line(asmline)
+        self.a.parse_line(asmline)
         output = []
         output.append(ALabel('lab1'))
-        self.assertSequenceEqual(output, a.output)
+        self.assertSequenceEqual(output, self.a.output)
 
     def testParse6(self):
         # A line can be empty
-        a = Assembler()
-        a.parse_line('')
+        self.a.parse_line('')
     
 class AssemblerOtherTestCase(unittest.TestCase):
     def testX86(self):
@@ -96,6 +91,20 @@
         # Compare with nasm output:
         nasmbytes = [0x48, 0x89, 0xd8, 0x48, 0x31, 0xd9, 0x48, 0xff, 0xc1]
 
+class AssemblerOtherTestCase(unittest.TestCase):
+    def setUp(self):
+        self.a = Assembler(target=msp430.MSP430())
+
+    def testMov(self):
+        line1 = "mov r14, r15"
+        self.a.assemble_line(line1)
+
+    def testAdd(self):
+        line1 = "addw r14, r15"
+        self.a.assemble_line(line1)
+
+
 if __name__ == '__main__':
+    # cProfile.run('unittest.main()')
     unittest.main()