diff python/ppci/target/msp430/msp430.py @ 342:86b02c98a717 devel

Moved target directory
author Windel Bouwman
date Sat, 01 Mar 2014 15:40:31 +0100
parents python/target/msp430.py@4d204f6f7d4e
children b4882ff0ed06
line wrap: on
line diff
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/python/ppci/target/msp430/msp430.py	Sat Mar 01 15:40:31 2014 +0100
@@ -0,0 +1,67 @@
+import struct
+import types
+from ..basetarget import Register, Instruction, Target
+from ppci.asmnodes import ASymbol, ANumber
+from ppci import CompilerError
+from .registers import r10, r11, r12, r13, r14, r15
+from .instructions import Reti, Mov, Add
+
+# Create the target class (singleton):
+
+class Msp430Target(Target):
+    def __init__(self):
+        super().__init__('msp430')
+
+        # Registers:
+        self.add_keyword('r10')
+        self.add_keyword('r11')
+        self.add_keyword('r12')
+        self.add_keyword('r13')
+        self.add_keyword('r14')
+        self.add_keyword('r15')
+        self.add_rule('reg', ['r10'], lambda rhs: r10)
+        self.add_rule('reg', ['r11'], lambda rhs: r11)
+        self.add_rule('reg', ['r12'], lambda rhs: r12)
+        self.add_rule('reg', ['r13'], lambda rhs: r13)
+        self.add_rule('reg', ['r14'], lambda rhs: r14)
+        self.add_rule('reg', ['r15'], lambda rhs: r15)
+
+        # Instructions rules:
+        self.add_keyword('mov')
+        self.add_instruction(['mov', 'reg', ',', 'reg'],
+            lambda rhs: Mov(rhs[1], rhs[3]))
+        self.add_instruction(['mov', 'imm16', ',', 'reg'],
+            lambda rhs: Mov(rhs[1], rhs[3]))
+
+        self.add_keyword('add')
+        self.add_instruction(['add', 'reg', ',', 'reg'],
+            lambda rhs: Add(rhs[1], rhs[3]))
+
+        self.add_keyword('reti')
+        self.add_instruction(['reti'], lambda rhs: Reti())
+
+        # Constants:
+        self.add_rule('imm32', ['val32'], lambda x: x[0].val)
+        self.add_rule('imm32', ['imm16'], lambda x: x[0])
+        self.add_rule('imm16', ['val16'], lambda x: x[0].val)
+        self.add_rule('imm16', ['imm8'], lambda x: x[0])
+        self.add_rule('imm8', ['val8'], lambda x: x[0].val)
+        self.add_rule('imm8', ['imm5'], lambda x: x[0])
+        self.add_rule('imm5', ['val5'], lambda x: x[0].val)
+        self.add_rule('imm5', ['imm3'], lambda x: x[0])
+        self.add_rule('imm3', ['val3'], lambda x: x[0].val)
+
+
+msp430target = Msp430Target()
+
+
+# Target description for the MSP430 processor
+
+
+msp430target.registers.append(r10)
+msp430target.registers.append(r11)
+msp430target.registers.append(r12)
+msp430target.registers.append(r13)
+msp430target.registers.append(r14)
+msp430target.registers.append(r15)
+