--- a/python/codegen.py	Sun Nov 24 11:24:15 2013 +0100
+++ b/python/codegen.py	Wed Nov 27 08:06:42 2013 +0100
@@ -1,30 +1,28 @@
 import ir
-import target
+from target import Target
 from ppci import CompilerError
 import transform
 import canon
+import registerallocator
 
 
-# TODO: this class could be target independent:
 class CodeGenerator:
-    def __init__(self, outs, target):
+    """ Generic code generator """
+    def __init__(self, target):
         # TODO: schedule traces in better order.
         # This is optional!
-        assert isinstance(tg, target.Target)
+        assert isinstance(target, Target), target
         self.target = target
-        self.ins_sel = ArmInstructionSelector()
+        self.ins_sel = target.ins_sel
         self.ra = registerallocator.RegisterAllocator()
-        self.outs = outs
-        self.outs.getSection('code').address = 0x08000000
-        self.outs.getSection('data').address = 0x20000000
 
-    def generateFunc(self, irfunc):
+    def generateFunc(self, irfunc, outs):
         """ Generate code for one function into a frame """
         # Cleanup function:
         transform.removeEmptyBlocks(irfunc)
 
         # Create a frame for this function:
-        frame = ArmFrame(irfunc.name)
+        frame = self.target.FrameClass(irfunc.name)
 
         # Canonicalize the intermediate language:
         canon.make(irfunc, frame)
@@ -34,32 +32,21 @@
         self.ra.allocFrame(frame)
         # TODO: Peep-hole here?
 
-        # Can we materialize here??
-
         # Add label and return and stack adjustment:
         frame.EntryExitGlue3()
 
         # Materialize assembly
         # Materialize the register allocated instructions into a stream of
         # real instructions.
-        frame.lower_to(self.outs)
+        frame.lower_to(outs)
         return frame
 
-    def generate(self, ircode):
+    def generate(self, ircode, outs):
         assert isinstance(ircode, ir.Module)
-        self.outs.selectSection('code')
-        # assembly glue to make it work:
-        # TODO: this must be in source code, not in compiler
-        self.outs.emit(arm.dcd_ins(Imm32(0x20000678)))   # initial SP
-        self.outs.emit(arm.dcd_ins(Imm32(0x08000009)))   # reset vector
-        self.outs.emit(arm.b_ins(LabelRef('main')))
+        outs.selectSection('code')
 
         # Munch program into a bunch of frames. One frame per function.
         # Each frame has a flat list of abstract instructions.
         # Generate code for all functions:
-        self.frames = [self.generateFunc(func) for func in ircode.Functions]
-
-        # TODO: fixup references, do this in another way?
-        self.outs.backpatch()
-        self.outs.backpatch()  # Why two times?
+        self.frames = [self.generateFunc(func, outs) for func in ircode.Functions]
         return self.frames